IBM nec pd78p081(a2) User Manual

Remarks 1. The internal ROM and high-speed RAM capacities depend on the product.

2. Pin connection in parentheses is intended for the 

µ

PD78P083.

P100/TI5/TO5

P101/TI6/TO6

SI2/R

X

D/P70

SO2/T

X

D/P71

SCK2/ASCK/P72

ANI0/P10-

ANI7/P17

AV

DD

AV

SS

AV

REF

INTP1/P01-

INTP3/P03

BUZ/P36

PCL/P35

PORT 0

PORT 1

PORT 3

PORT 5

PORT 7

PORT 10

SYSTEM  

CONTROL

8-bit TIMER/
EVENT COUNTER 5

BUZZER OUTPUT

INTERRUPT
CONTROL

A/D                
CONVERTER

SERIAL          

INTERFACE 2

WATCHDOG
TIMER

CLOCK OUTPUT
CONTROL

8-bit TIMER/
EVENT COUNTER 6

78K/0

CPU

CORE

ROM

RAM

P00

P01-P03

P10-P17

P30-P37

P50-P57

P70-P72

P100, P101

RESET

X1

X2

V

DD

V

SS

IC

(V

PP

)