Intel architecture ia-32 User Manual

Page of 636
Vol. 3A 5-63
INTERRUPT AND EXCEPTION HANDLING
Saved Instruction Pointer
The saved contents of CS and EIP registers point to the SSE/SSE2/SSE3 instruction that was
executed when the SIMD floating-point exception was generated. This is the faulting instruction
in which the error condition was detected.
Program State Change
A program-state change does not accompany a SIMD floating-point exception because the
handling of the exception is immediate unless the particular exception is masked. The available
state information is often sufficient to allow recovery from the error and re-execution of the
faulting instruction if needed.