Intel architecture ia-32 User Manual
6-10 Vol. 3A
TASK MANAGEMENT
The LTR instruction loads a segment selector (source operand) into the task register that points
to a TSS descriptor in the GDT. It then loads the invisible portion of the task register with infor-
mation from the TSS descriptor. LTR is a privileged instruction that may be executed only when
the CPL is 0. It’s used during system initialization to put an initial value in the task register.
Afterwards, the contents of the task register are changed implicitly when a task switch occurs.
to a TSS descriptor in the GDT. It then loads the invisible portion of the task register with infor-
mation from the TSS descriptor. LTR is a privileged instruction that may be executed only when
the CPL is 0. It’s used during system initialization to put an initial value in the task register.
Afterwards, the contents of the task register are changed implicitly when a task switch occurs.
The STR (store task register) instruction stores the visible portion of the task register in a
general-purpose register or memory. This instruction can be executed by code running at any
privilege level in order to identify the currently running task. However, it is normally used only
by operating system software.
general-purpose register or memory. This instruction can be executed by code running at any
privilege level in order to identify the currently running task. However, it is normally used only
by operating system software.
On power up or reset of the processor, segment selector and base address are set to the default
value of 0; the limit is set to FFFFH.
value of 0; the limit is set to FFFFH.
Figure 6-5. Task Register
Segment Limit
Selector
+
GDT
TSS Descriptor
0
Base Address
Task
Invisible Part
Visible Part
TSS
Register