Intel architecture ia-32 User Manual

9-38 Vol. 3A

Total Size

32

4

Specifies the total size of the microcode update in 
bytes.  It is the summation of the header size, the 
encrypted data size and the size of the optional 
extended signature table.

Reserved

36

12

Reserved fields for future expansion

Update Data

48

Data Size 
or 2000

Update data

Extended 
Signature Count

Data Size + 
48 

4

Specifies the number of extended signature structures 
(Processor Signature[n], processor flags[n] and 
checksum[n]) that exist in this microcode update.

Extended 
Checksum

Data Size + 
52

4

Checksum of update extended processor signature 
table.  Used to verify the integrity of the extended 
processor signature table.  Checksum is correct when 
the summation of the DWORDs that comprise the 
extended processor signature table results in 
00000000H.

Reserved

Data Size + 
56

12

Reserved fields

Processor 
Signature[n]

Data Size + 
68 + (n * 12)

4

Extended family, extended model, type, family, model, 
and stepping of processor that requires this particular 
update revision (e.g., 00000650H). Each microcode 
update is designed specifically for a given extended 
family, extended model, type, family, model, and 
stepping of the processor. 

The BIOS uses the processor signature field in 
conjunction with the CPUID instruction to determine 
whether or not an update is appropriate to load on a 
processor. The information encoded within this field 
exactly corresponds to the bit representations returned 
by the CPUID instruction.

Processor Flags[n]

Data Size + 
72 + (n * 12)

4

Platform type information is encoded in the lower 8 bits 
of this 4-byte field.  Each bit represents a particular 
platform type for a given CPUID.  The BIOS uses the 
processor flags field in conjunction with the platform Id 
bits in MSR (17H) to determine whether or not an 
update is appropriate to load on a processor.  Multiple 
bits may be set representing support for multiple 
platform IDs.