Intel architecture ia-32 User Manual
Vol. 3A 13-13
POWER AND THERMAL MANAGEMENT
•
Thermal Threshold #2 Log (bit 9, R/WC0) — Sticky bit that indicates whether the
Thermal Threshold #2 has been reached since the last clearing of this bit or a reset. If
bit 9 = 1, the Thermal Threshold #2 has been reached. Software may clear this bit by
writing a zero.
Thermal Threshold #2 has been reached since the last clearing of this bit or a reset. If
bit 9 = 1, the Thermal Threshold #2 has been reached. Software may clear this bit by
writing a zero.
•
Digital Readout (bits 22:16, RO) — Digital temperature reading in 1 degree Celsius
relative to Tj(Max). 0 = Tj(Max); 1 = Tj(Max) - 1
relative to Tj(Max). 0 = Tj(Max); 1 = Tj(Max) - 1
o
C; etc. See the processor’s data sheet
for details regarding Tj(Max).
•
Resolution in Degrees Celsius (bits 30:27, RO) — Specifies the resolution (or tolerance)
of the digital thermal sensor. The value is in degrees Celsius. It is recommended that new
threshold values be offset from the current temperature by at least the resolution + 1 in
order to avoid hysteresis of interrupt generation.
of the digital thermal sensor. The value is in degrees Celsius. It is recommended that new
threshold values be offset from the current temperature by at least the resolution + 1 in
order to avoid hysteresis of interrupt generation.
•
Reading Valid (bit 31, RO) — Indicates if the digital readout in bits 22:16 is valid. The
readout is valid if bit 31 = 1.
readout is valid if bit 31 = 1.
Changes to temperature can be detected using two thresholds (see Figure 13-9); one is set above
and the other below the current temperature. These thresholds have the capability of generating
interrupts using the core's local APIC which software must then service. Note that the local
APIC entries used by these thresholds are also used by the Intel® Thermal Monitor; it is up to
software to determine the source of a specific interrupt.
and the other below the current temperature. These thresholds have the capability of generating
interrupts using the core's local APIC which software must then service. Note that the local
APIC entries used by these thresholds are also used by the Intel® Thermal Monitor; it is up to
software to determine the source of a specific interrupt.
See Figure 13-9 for the layout of IA32_THERM_INTERRUPT MSR. Bit fields include:
•
High-Temperature Interrupt Enable (bit 0, R/W) — This bit allows the BIOS to enable
the generation of an interrupt on the transition from low-temperature to a high-temperature
threshold. Bit 0 = 0 (default) disables interrupts; bit 0 = 1 enables interrupts.
the generation of an interrupt on the transition from low-temperature to a high-temperature
threshold. Bit 0 = 0 (default) disables interrupts; bit 0 = 1 enables interrupts.
•
Low-Temperature Interrupt Enable (bit 1, R/W) — This bit allows the BIOS to enable
the generation of an interrupt on the transition from high-temperature to a low-temper-
ature. Bit 0 = 0 (default) disables interrupts; bit 0 = 1 enables interrupts.
the generation of an interrupt on the transition from high-temperature to a low-temper-
ature. Bit 0 = 0 (default) disables interrupts; bit 0 = 1 enables interrupts.
Figure 13-9. IA32_THERM_INTERRUPT Register
63
0
Reserved
15
Threshold #2 Interrupt Enable
1
2
3
4
5
8
14
16
22
23
24
Threshold #2 Value
Threshold #1 Interrupt Enable
Threshold #1 Value
Overheat Interrupt Enable
FORCPR# Interrupt Enable
THERMTRIP Interrupt Enable
Low Temp. Interrupt Enable
High Temp. Interrupt Enable
Threshold #1 Interrupt Enable
Threshold #1 Value
Overheat Interrupt Enable
FORCPR# Interrupt Enable
THERMTRIP Interrupt Enable
Low Temp. Interrupt Enable
High Temp. Interrupt Enable