Intel architecture ia-32 User Manual
Vol. 3A 15-23
8086 EMULATION
15.3.3
Class 3—Software Interrupt Handling in Virtual-8086 Mode
When the processor receives a software interrupt (an interrupt generated with the INT n
instruction) while in virtual-8086 mode, it can use any of six different methods to handle the
interrupt. The method selected depends on the settings of the VME flag in control register CR4,
the IOPL field in the EFLAGS register, and the software interrupt redirection bit map in the
TSS. Table 15-2 lists the six methods of handling software interrupts in virtual-8086 mode and
the respective settings of the VME flag, IOPL field, and the bits in the interrupt redirection bit
map for each method. The table also summarizes the various actions the processor takes for
each method.
instruction) while in virtual-8086 mode, it can use any of six different methods to handle the
interrupt. The method selected depends on the settings of the VME flag in control register CR4,
the IOPL field in the EFLAGS register, and the software interrupt redirection bit map in the
TSS. Table 15-2 lists the six methods of handling software interrupts in virtual-8086 mode and
the respective settings of the VME flag, IOPL field, and the bits in the interrupt redirection bit
map for each method. The table also summarizes the various actions the processor takes for
each method.
The VME flag enables the virtual mode extensions for the Pentium and later IA-32 processors.
When this flag is clear, the processor responds to interrupts and exceptions in virtual-8086 mode
in the same manner as an Intel386 or Intel486 processor does. When this flag is set, the virtual
mode extension provides the following enhancements to virtual-8086 mode:
When this flag is clear, the processor responds to interrupts and exceptions in virtual-8086 mode
in the same manner as an Intel386 or Intel486 processor does. When this flag is set, the virtual
mode extension provides the following enhancements to virtual-8086 mode:
•
Speeds up the handling of software-generated interrupts in virtual-8086 mode by allowing
the processor to bypass the virtual-8086 monitor and redirect software interrupts back to
the interrupt handlers that are part of the currently running 8086 program.
the processor to bypass the virtual-8086 monitor and redirect software interrupts back to
the interrupt handlers that are part of the currently running 8086 program.
•
Supports virtual interrupts for software written to run on the 8086 processor.
The IOPL value interacts with the VME flag and the bits in the interrupt redirection bit map to
determine how specific software interrupts should be handled.
determine how specific software interrupts should be handled.
The software interrupt redirection bit map (see Figure 15-5) is a 32-byte field in the TSS. This
map is located directly below the I/O permission bit map in the TSS. Each bit in the interrupt
redirection bit map is mapped to an interrupt vector. Bit 0 in the interrupt redirection bit map
(which maps to vector zero in the interrupt table) is located at the I/O base map address in the
TSS minus 32 bytes. When a bit in this bit map is set, it indicates that the associated software
interrupt (interrupt generated with an INT n instruction) should be handled through the
protected-mode IDT and interrupt and exception handlers. When a bit in this bit map is clear,
the processor redirects the associated software interrupt back to the interrupt table in the 8086
program (located at linear address 0 in the program’s address space).
map is located directly below the I/O permission bit map in the TSS. Each bit in the interrupt
redirection bit map is mapped to an interrupt vector. Bit 0 in the interrupt redirection bit map
(which maps to vector zero in the interrupt table) is located at the I/O base map address in the
TSS minus 32 bytes. When a bit in this bit map is set, it indicates that the associated software
interrupt (interrupt generated with an INT n instruction) should be handled through the
protected-mode IDT and interrupt and exception handlers. When a bit in this bit map is clear,
the processor redirects the associated software interrupt back to the interrupt table in the 8086
program (located at linear address 0 in the program’s address space).
NOTE
The software interrupt redirection bit map does not affect hardware generated
interrupts and exceptions. Hardware generated interrupts and exceptions are
always handled by the protected-mode interrupt and exception handlers.
interrupts and exceptions. Hardware generated interrupts and exceptions are
always handled by the protected-mode interrupt and exception handlers.