Intel Pentium M 730 RH80536GE0252M User Manual
Product codes
RH80536GE0252M
Configuration and Low Power Features
Mobile Intel
Pentium
4 Processor-M Datasheet
93
7.
Configuration and Low Power Features
7.1
Power-On Configuration Options
Several configuration options can be configured by hardware. The Mobile Intel Pentium 4
Processor-M samples its hardware configuration at reset, on the active-to-inactive transition of
RESET#. For specifications on these options, please refer to
Processor-M samples its hardware configuration at reset, on the active-to-inactive transition of
RESET#. For specifications on these options, please refer to
Frequency determination functionality will exist on engineering sample processors which means
that samples can run at varied frequencies. Production material will have the bus to core ratio
locked during manufacturing and can only be operated at the rated frequency.
that samples can run at varied frequencies. Production material will have the bus to core ratio
locked during manufacturing and can only be operated at the rated frequency.
The sampled information configures the processor for subsequent operation. These configuration
options cannot be changed except by another reset. All resets reconfigure the processor.
options cannot be changed except by another reset. All resets reconfigure the processor.
NOTE:
Asserting this signal during RESET# will select the corresponding option.
7.2
Clock Control and Low Power States
The use of AutoHALT, Stop-Grant, Sleep, Deep Sleep and Deeper Sleep states is allowed in
Mobile Intel Pentium 4 Processor-M based systems to reduce power consumption by stopping the
clock to internal sections of the processor, depending on each particular state. See
Mobile Intel Pentium 4 Processor-M based systems to reduce power consumption by stopping the
clock to internal sections of the processor, depending on each particular state. See
for a
visual representation of the processor low-power states.
7.2.1
Normal State
This is the normal operating state for the processor.
7.2.2
AutoHALT Powerdown State
AutoHALT is a low-power state entered when the processor executes the HALT instruction. The
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#,
LINT[1:0] (NMI, INTR), or PSB interrupt message. RESET# will cause the processor to
immediately initialize itself.
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#,
LINT[1:0] (NMI, INTR), or PSB interrupt message. RESET# will cause the processor to
immediately initialize itself.
Table 41. Power-On Configuration Option Pins
Configuration Option
Pin
1
Output tristate
SMI#
Execute BIST
INIT#
In Order Queue pipelining (set IOQ depth to 1)
A7#
Disable MCERR# observation
A9#
Disable BINIT# observation
A10#
APIC Cluster ID (0-3)
A[12:11]#
Disable bus parking
A15#
Symmetric agent arbitration ID
BR0#