Intel i5-2400S BX80623I52400S User Manual

Product codes

BX80623I52400S

Datasheet, Volume 1

Contents

Introduction ..............................................................................................................9
1.1

Processor Feature Details ................................................................................... 11
1.1.1

Supported Technologies .......................................................................... 11

1.2

Interfaces ........................................................................................................ 11
1.2.1

System Memory Support ......................................................................... 11

1.2.2

PCI Express* ......................................................................................... 12

1.2.3

Direct Media Interface (DMI).................................................................... 13

1.2.4

Platform Environment Control Interface (PECI)........................................... 14

1.2.5

Processor Graphics ................................................................................. 14

1.2.6

Intel

Flexible Display Interface (Intel

FDI) ............................................. 14

1.3

Power Management Support ............................................................................... 15
1.3.1

Processor Core....................................................................................... 15

1.3.2

System ................................................................................................. 15

1.3.3

Memory Controller.................................................................................. 15

1.3.4

PCI Express* ......................................................................................... 15

1.3.5

DMI...................................................................................................... 15

1.3.6

Processor Graphics Controller................................................................... 15

1.4

Thermal Management Support ............................................................................ 15

1.5

Package ........................................................................................................... 16

1.6

Terminology ..................................................................................................... 16

1.7

Interfaces................................................................................................................ 19
2.1

System Memory Interface .................................................................................. 19
2.1.1

System Memory Technology Supported ..................................................... 19

2.1.2

System Memory Timing Support............................................................... 20

2.1.3

System Memory Organization Modes......................................................... 21
2.1.3.1

Single-Channel Mode................................................................. 21

2.1.3.2

Dual-Channel Mode – Intel

Flex Memory Technology Mode ........... 21

2.1.4

Rules for Populating Memory Slots............................................................ 22

2.1.5

Technology Enhancements of Intel

Fast Memory Access (Intel

FMA).......... 22

2.1.5.1

Just-in-Time Command Scheduling.............................................. 22

2.1.5.2

Command Overlap .................................................................... 23

2.1.5.3

Out-of-Order Scheduling ............................................................ 23

2.1.6

Memory Type Range Registers (MTRRs) Enhancement................................. 23

2.1.7

Data Scrambling .................................................................................... 23

2.2

PCI Express* Interface....................................................................................... 24
2.2.1

PCI Express* Architecture ....................................................................... 24
2.2.1.1

Transaction Layer ..................................................................... 25

2.2.1.2

Data Link Layer ........................................................................ 25

2.2.1.3

Physical Layer .......................................................................... 25

2.2.2

PCI Express* Configuration Mechanism ..................................................... 26

2.2.3

PCI Express* Port................................................................................... 26

2.2.4

PCI Express Lanes Connection.................................................................. 27

2.3

Direct Media Interface (DMI)............................................................................... 27
2.3.1

DMI Error Flow....................................................................................... 27

2.3.2

Processor/PCH Compatibility Assumptions.................................................. 27

2.3.3

DMI Link Down ...................................................................................... 28

2.4

Processor Graphics Controller (GT) ...................................................................... 28
2.4.1

3D and Video Engines for Graphics Processing............................................ 29
2.4.1.1

3D Engine Execution Units ......................................................... 29