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Intel X5690 AT80614005913AB User Manual

Product codes
AT80614005913AB
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Intel
®
 Xeon
®
 Processor 5600 Series Datasheet Volume 1
43
Electrical Specifications
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
 is the maximum voltage level at a receiving agent that will be interpreted as a logical low value.
3.
V
IH
 is the minimum voltage level at a receiving agent that will be interpreted as a logical high value.
4.
V
IH
 and V
OH
 may experience excursions above V
DDQ
. However, input signal drivers must comply with the 
signal quality specifications. Refer to 
.
5.
This is the pull down driver resistance. 
6.
R
VTT_TERM
 is the termination on the DIMM and not controlled by the processor. Please refer to the applicable 
DIMM datasheet.
7.
The minimum and maximum values for these signals are programmable by BIOS to one of the pairs.
8.
COMP resistance must be provided on the system board with 1% resistors.
Table 2-12. DDR3 and DDR3L Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
V
IL
Input Low Voltage
0.43*V
DDQ
V
2,
V
IH
Input High Voltage
0.57*V
DDQ
V
3,  4
V
OL
Output Low Voltage
(V
DDQ
 / 2)* (R
ON 
/(R
ON
+R
VTT_TERM
))
V
6
V
OH
Output High Voltage
V
DDQ
 - ((V
DDQ
 / 2)* 
(R
ON
/(R
ON
+R
VTT_TERM
))
V
4,6
R
ON
Clock Buffer On 
Resistance
21
31
5
R
ON
Command Buffer On 
Resistance
16
24
5
R
ON
Control Buffer On 
Resistance
21
31
5
R
ON
Data Buffer On 
Resistance
21
33
5
R
ON
RESET Buffer On 
Resistance
5
53
5
Data ODT
On-Die Termination for 
Data Signals
45
90
55
110
7
ParErr ODT On-Die Termination for 
Parity Error bits
90
110
I
LI
Input Leakage Current
N/A
N/A
± 500
mA
DDR_COMP0 COMP Resistance
99
100
101
8
DDR_COMP1 COMP Resistance
24.65
24.9
25.15
8
DDR_COMP2 COMP Resistance
128.7
130
131.3
8
Table 2-13. PECI Signal DC Electrical Limits (Sheet 1 of 2)
Symbol
Definition and Conditions
Min
Max
Units
Notes
1
V
In
Input Voltage Range
-0.150
V
TTD
 + 0.150
V
V
Hysteresis
Hysteresis
0.100 * V
TTD
V
V
N
Negative-edge threshold voltage
0.275 * V
TTD
0.500 * V
TTD
V
2,6
V
P
Positive-edge threshold voltage
0.550 * V
TTD
0.725 * V
TTD
V
2,6
R
Pullup
Pullup Resistance
(V
OH
 = 0.75 * V
TTD
)
N/A
50
I
Leak+
High impedance state leakage to 
V
TTD
 (V
leak
 = V
OL
) 
N/A
50
µA
3