Xircom An Intel Company GEM3501 User Manual

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Core Engine GSM/GPRS Modem Developer Guide Preliminary Draft: 7/6/2001 
30 
Part Number: 07100026, Revision: 002 
Confidential
 
© 2001 Xircom, Inc., an Intel company All rights reserved.  
All trademarks and copyrights are the property of Xircom, Inc., an Intel company 
7.3 Speaker Output 
The Core Engine speaker (output) interface specification is shown in Table 9: 
 
Differential output voltage typical 
3.7V 
Output differential maximum DC offset 
100mV 
Differential output load resistance minimum 
15ohm 
Output load capacitance maximum 
4700pF 
Table 8:  Core Engine speaker interface specification. 
The baseband is powered at 2.5V in the audio circuit design.  The minimum load is 15 
ohms. 
The 3.7V peak-to-peak specification is a differential measurement with the reference of 
SPK_N1 or SPK_N2 (pins 9 and 36 respectively of the Core Engine I/O interface).  Each 
SPK_xx positive/negative pair can swing approximately 1.85V peak, with respect to 
ground.  The 3.7V peak-to-peak is obtainable because the SPK_Px positive is 180 
degrees out of phase with the negative.  Since this occurs simultaneously, the differential 
measurement is (2 * 1.85V), or 3.7V peak-to-peak.  
There is no audio power amp component in our design.  The signals are driven directly by 
the baseband processor.