IBM Intel Xeon E5606 49Y3765 User Manual

Product codes
49Y3765
Page of 186
Thermal Specifications
156
Intel
®
 Xeon
®
 Processor 5600 Series Datasheet Volume 1
• Assured Write FCS (AW FCS) failure. Note that under most circumstances, an 
Assured Write failure will appear as a bad FCS. However, when an originator issues 
a poorly formatted command with a miscalculated AW FCS, the client will 
intentionally abort the FCS in order to guarantee originator notification.
7.3.4.2
Completion Codes
Some PECI commands respond with a completion code byte. These codes are designed 
to communicate the pass/fail status of the command and also provide more detailed 
information regarding the class of pass or fail. For all commands listed in 
 
that support completion codes, each command’s completion codes is listed in its 
respective section. What follows are some generalizations regarding completion codes.
An originator that is decoding these commands can apply a simple mask to determine 
pass or fail. Bit 7 is always set on a failed command, and is cleared on a passing 
command.
Note:
The codes explicitly defined in this table may be useful in PECI originator response 
algorithms. All reserved or undefined codes may be generated by a PECI client device, 
and the originating agent must be capable of tolerating any code. The Pass/Fail mask 
defined in 
 applies to all codes and general response policies may be based 
on that limited information.
Table 7-33. Completion Code Pass/Fail Mask
0xxx xxxxb
Command passed
1xxx xxxxb
Command failed
Table 7-34. Device Specific Completion Code (CC) Definition
Completion
Code
Description
0x00..0x3F
Device specific pass code
0x40
Command Passed
0x4X
Command passed with a transaction ID of ‘X’ (0x40 | Transaction_ID[3:0])
0x50..0x7F
Device specific pass code
0x80
Error causing a response timeout. Either due to a rare, internal timing condition or a 
processor RESET condition or processor S1 state. Retry is appropriate outside of the RESET 
or S1 states.
 0x81
Thermal configuration data was malformed or exceeded limits.
 0x82
Thermal status mask is illegal
 0x83
Invalid counter select
 0x84
Invalid Machine Check Bank or Index
 0x85
Failure due to lack of Mailbox lock or invalid Transaction ID
 0x86
Mailbox interface is unavailable or busy
 0x88
Machine Check Banks is currently unavailable (selected core is asleep or unavailable)
 0x89
Invalid Core Select for Machine Check Bank Read
0xFF
Unknown/Invalid Request