IBM Intel Xeon E5620 49Y3773 User Manual

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cleared. In the event that this timeout occurs, the originating agent will receive a failed 
completion code upon issuing a MbxGet() command, or even worse, it may receive 
corrupt data if this MbxGet() command so happens to be interleaved with an 
MbxSend() from another process. Please refer to 

 for more information 

regarding failed completion codes from MbxGet() commands.

Timeouts are undesirable, and the best way to avoid them and guarantee valid data is 
for the originating agent to always issue MbxGet() commands immediately following 
MbxSend() commands.

If the timeout policy is too restrictive, it can be disabled. BIOS may write 
MSR_MISC_POWER_MGMT (0x1AA), bit 11 to 0b1 in order to force a disable of this 
automatic timeout.

The PECI mailbox interface is designed to have response data available within plenty of 
margin to allow for back-to-back MbxSend() and MbxGet() requests. However, under 
rare circumstances that are out of the scope of this specification, it is possible that the 
response data is not available when the MbxGet() command is issued. Under these 
circumstances, the MbxGet() command will respond with an Abort FCS and the 
originator should re-issue the MbxGet() request.

The Intel Xeon processor 5600 series does not support multiple domains, but it is 
possible that future products will, and the following tables are included as a reference 
for domain-specific definitions.

The Client responds with an Abort FCS under the following conditions:

• The decoded command is not understood or not supported on this processor (this 

includes good command codes with bad Read Length or Write Length bytes).

• Data is not ready.

0b10

1

GetTemp()

0x02

PCIConfigRd()

0xC2

PCIConfigWr()

0xC6

MbxSend()

0xD2

MbxGet()

0xD6