Intel E7-2803 AT80615006438AB User Manual

Product codes
AT80615006438AB
Page of 50
Datasheet Volume 2 of 2
19
Address Map
In the Addr field, letters have the following meaning:
• "x...x": match any value
• "aaaa": match if equal to IOMMEN cfg_base field
• "bbbbb": match if equal to IOMMEN sca_clump field
• "ccc": match if corresponding IOMMEN sca_ena bit is set
• "dddd": match if greater than IOMMEN cfg_base and Addr[31] = 0
• "eeee": match if greater than IOMMEN cfg_base and Addr[31] = 1; prevent match 
when Addr[31:26] = 111111
• "ffff": match if the BIOSEN r/w enable bit is set for the corresponding segment, for 
reads and writes, respectively
• "*" means that Addr[43:32] = 0x000 always matches, and Addr[43:32] = 0xFF0 
matches in SMM mode
• "+" means that the address is in the I/O address space, separate from the memory 
address space
Target lists are needed for the CFG, MMIOL0/1, CPU/IOH Cfg, IOAPIC, FWH, and 
Legacy I/O regions. These entries make up the I/O Large (IOL) Decoder. The reasons 
for the existence of target lists for these regions are described in the following table. 
3.2
Intel
®
 Trusted Execution Technology (Intel
®
 TXT)
Intel
®
 Trusted Execution Technology (Intel
®
 TXT) is a component of the Intel
®
 Safer 
Computing Initiative (Intel
®
 SCI). Intel
®
 TXT was first introduced in client platforms. 
Intel TXT for Servers is an effort to extend Intel
®
 TXT into server platforms. Intel
®
 TXT 
for Servers is a software binary compatible with Intel
®
 TXT and uses a security model 
that allows the RAS features to co-exist with security. To achieve this objective, some 
of the system firmware is allowed to be within the trust boundary.
Intel
®
 TXT provides an architected process to measure the BIOS and measured launch 
environment (for example, VMM or OS) before launch.
3.2.1
Key Concepts
• Intel
®
 TXT is a family of security capabilities now available on server platforms.
• Intel
®
 TXT uses features in the processors, chipset, BIOS, and TPM to enable more 
secure platforms. 
• Intel
®
 TXT works through measurement, dynamic launch mechanisms via special 
instructions, memory locking and sealing secrets. 
• Intel
®
 TXT helps detect and/or prevent software attacks. 
IntLog
N/A
N/A
N/A
1
N/A
always
IOS6
IntPhy
N/A
N/A
N/A
1
N/A
always
IOS6
EOI
N/A
N/A
N/A
1
N/A
always
IOS6
FERR
N/A
N/A
N/A
1
N/A
always
IOS5
Notes:
1.
Non-contiguous
Table 3-3.
I/O Decoder Entries (Sheet 2 of 2)
Name
Addr[31:14]
Size
Attr
Tgts
Index
Enable
Entry