Intel E7-2803 AT80615006438AB User Manual

42

Datasheet Volume 2 of 2 

Each thread in a core can request a transition to a C-state independent of the state of 
the other threads in that core. The core will handle coordination of these thread specific 
requests; there is no functional need for software to understand the dependencies 
between the threads in a core, or the cores in a package, for any given C-state.

Any enabled thread in the core is capable of requesting a different C-state. The core 
must resolve the C-state requests of each enabled thread, and convey the resolved 
request to the Wbox in the uncore on entry to a core C-state. In order to resolve these 
requests, the Intel Xeon Processor E7-8800/4800/2800 Product Families must have 
access to the current C-state of all threads on the core. 

The C-state request is resolved by the core to the lowest numbered C-state requested 
by any of the enabled threads on that core. If either thread is in C0, the resolved 
C-state is C0. If neither thread is in C0, and 1 thread is in C1, then C1 is the resolved 
state, and so on. 

C0

C3

C1E

1. No transition to C 0 is needed to service a snoop when in C 1 or C1E.

.

2. Transitions back to C 0 occur on an interrupt or on access to monitored address  (if state was entered via MWAIT ).

.

2

C1

1

C6

2

2

MWAIT C1, 

HLT

HALT/

MWAIT 

C1E

MWAIT C3, 

I/O C3

MWAIT ,C6 

I/O C6

2

C0

C0

C1, and no threads are in C0

C1

C1E, and no threads are in C0 or C1

C1E

C3, and no threads are in C0, C1, or C1E

C3

C6 and no threads are in C0, C1, C1E, or C3 

C6