Intel E7-2830 AT80615005787AB User Manual

Product codes
AT80615005787AB
Page of 34
Intel
®
 Xeon
®
 Processor E7-8800/4800/2800 Product Families
27
Specification Update
 September 2012
restart an I/O instruction if the platform has not been configured to generate a 
synchronous SMI for the recorded I/O port address.
Status:
For the steppings affected, see the 
BP42.
Writing an Illegal Vector to the IA32_X2APIC_SELF_IPI MSR Will 
Hang the Processor
Problem:
Writing an illegal vector (0 to 15) to the IA32_X2APIC_SELF_IPI MSR while the local 
APIC is in x2APIC mode will cause the processor to hang.
Implication:
When this erratum occurs, the processor will hang.
Workaround:
Software should not write an illegal vector to the IA32_X2APIC_SELF_IPI MSR while 
the local APIC is in X2APIC mode. Virtual-machine monitors should not allow guest 
software to write to the IA32_X2APIC_SELF_IPI MSR.
Status:
For the steppings affected, see the 
BP43.
Successive Fixed Counter Overflows May be Discarded
Problem:
Under specific internal conditions, when using Freeze PerfMon on PMI feature (bit 12 in 
IA32_DEBUGCTL.Freeze_PerfMon_on_PMI, MSR 1D9H), if two or more PerfMon Fixed 
Counters overflow very closely to each other, the overflow may be mishandled for some 
of them. This means that the counter’s overflow status bit (in 
MSR_PERF_GLOBAL_STATUS, MSR 38EH) may not be updated properly; additionally, 
PMI interrupt may be missed if software programs a counter in Sampling-Mode (PMI bit 
is set on counter configuration).
Implication:
Successive Fixed Counter overflows may be discarded when Freeze PerfMon on PMI is 
used.
Workaround:
Software can avoid this by:
1. Avoid using Freeze PerfMon on PMI bit
2. Enable only one fixed counter at a time when using Freeze PerfMon on PMI
Status:
For the steppings affected, see the 
BP44.
VM Exits Due to “NMI-Window Exiting” May Not Occur Following a VM 
Entry to the Shutdown State
Problem:
If VM entry is made with the “virtual NMIs” and “NMI-window exiting”, VM-execution 
controls set to 1, and if there is no virtual-NMI blocking after VM entry, a VM exit with 
exit reason “NMI window” should occur immediately after VM entry unless the VM entry 
put the logical processor in the wait-for SIPI state. Due to this erratum, such VM exits 
do not occur if the VM entry put the processor in the shutdown state.
Implication:
A VMM may fail to deliver a virtual NMI to a virtual machine in the shutdown state.
Workaround:
Before performing a VM entry to the shutdown state, software should check whether 
the “virtual NMIs” and “NMI-window exiting” VM-execution controls are both 1. If they 
are, software should clear “NMI-window exiting” and inject an NMI as part of VM entry.
Status:
For the steppings affected, see the 
BP45.
Execution of INVVPID Outside 64-Bit Mode Cannot Invalidate 
Translations For 64-Bit Linear Addresses
Problem:
Executions of the INVVPID instruction outside 64-bit mode with the INVVPID type 
“individual-address invalidation” ignore bits 63:32 of the linear address in the INVVPID 
descriptor and invalidate translations for bits 31:0 of the linear address.
Implication:
The INVVPID instruction may fail to invalidate translations for linear addresses that set 
bits in the range 63:32. Because this erratum applies only to executions outside 64-bit 
mode, it applies only to attempts by a 32-bit virtual-machine monitor (VMM) to 
invalidate translations for a 64-bit guest. Intel has not observed this erratum with any 
commercially available software.