Intel E7-2860 AT80615005781AB User Manual

Intel

®

 Xeon

®

 Processor E7-8800/4800/2800 Product Families

21

Specification Update

 September 2012

Implication:

Due to this erratum, an unexpected Page Fault may occur during stress testing when 

the processor core transitions from C6 to C0.

Workaround:

It is possible for the BIOS to contain a workaround for this erratum.

Status:

For the steppings affected, see the 

Problem:

DAS (Directory Assisted Snoopy) enabled systems may hang with home agent IMT (In-

Flight Memory Table) state transition error during stress test.

Implication:

This erratum results in home agent timeout or IMT state transition/IMT parity error 

causing a system hang.

Workaround:

A BIOS code change has been identified and may be implemented as a workaround for 

this erratum.

Workaround:

A BIOS workaround has been identified. Please refer to reference code version 2.0 or 

later and release notes.

Status:

For the steppings affected, see the 

Problem:

The processor reset flow incorrectly sets BSP bit [8] to 1 in the IA32_APIC_BASE 

register for Core 9 (of 10 cores).

Implication:

When BIOS wakes up Application Processors (APs) using INIT-SIPI-SIPI, BIOS may 

identify more than one Boot Strap Processor (BSP). This may lead to unpredictable 

system behavior.

Workaround:

Clear bit [8] in the IA32_APIC_BASE register prior to the BIOS MP Initialization routine.

Status:

For the steppings affected, see the 

Problem:

Memory reads may return incorrect data with CKE (Clock Enabled) Low enabled while 

running with homogeneous Quad Rank DIMMs in Open Page or Adaptive Page Mode.

Implication:

System memory may return incorrect data in this configuration.

Workaround:

Disable CKE Low if supporting Quad Rank DIMMs in Open or Adaptive Page Mode.

Status:

For the steppings affected, see the 

Problem:

Under certain conditions the system configuration controller may not correctly handle 

NcRd (Non-Coherent Read) packets which may result in a misaligned uncorrectable 

error, Machine Check Exception or system hang

Implication:

The system configuration controller incorrectly signals an uncorrectable error resulting 

in a system hang.

Workaround:

It is possible for the BIOS to contain a workaround for this erratum.

Status:

For the steppings affected, see the 

Problem:

Each Intel

®

 QPI and Intel

®

 SMI physical layer port may be configured through its 

PBOXERRMASK register (Device:0x14, Function:0x2, Offset:0x68) to generate RAS 

recoverable error signals in any of the four situations: initialization failure, width 

reduction (Intel

®

 QPI) or lane failover (Intel

®

 SMI), drift buffer alarm, or latency buffer