AeroComm Corporation PKLR2400-200 User Manual
AC5124-10 Specifications
AC5124-10 Specifications
AC5124-10 Specifications
AC5124-10 Specifications
11/24/03
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3.2.2
3.2.2
3.2.2
3.2.2 In Range (IN_RANGE)
In Range (IN_RANGE)
In Range (IN_RANGE)
In Range (IN_RANGE)
The IN_RANGE pin will be driven logic low when a Client is in range of a Server on the same Channel
and System ID. If a Client cannot hear a Server for the amount of time that is programmed in the
Range Refresh EEPROM address 32h, the Client drives the IN_RANGE pin logic high and enters a
search mode looking for a Server. As soon as it detects a Server, the IN_RANGE pin will be driven
logic low.
and System ID. If a Client cannot hear a Server for the amount of time that is programmed in the
Range Refresh EEPROM address 32h, the Client drives the IN_RANGE pin logic high and enters a
search mode looking for a Server. As soon as it detects a Server, the IN_RANGE pin will be driven
logic low.
3.2.3
3.2.3
3.2.3
3.2.3 Baud Rate Selector (BDSEL)
Baud Rate Selector (BDSEL)
Baud Rate Selector (BDSEL)
Baud Rate Selector (BDSEL)
The Baud Rate Selector (BDSEL) pin provides the OEM a default method of communicating with a
transceiver in the event the EEPROM baud rate parameters become corrupted. If Pin 26 is logic high
or not connected, the baud rate will default to that specified in EEPROM. If Pin 26 is logic low at
RESET, the baud rate will default to 9600 baud.
transceiver in the event the EEPROM baud rate parameters become corrupted. If Pin 26 is logic high
or not connected, the baud rate will default to that specified in EEPROM. If Pin 26 is logic low at
RESET, the baud rate will default to 9600 baud.
3.2.4
3.2.4
3.2.4
3.2.4 Microprocessor Reset (µP_RESET)
Microprocessor Reset (µP_RESET)
Microprocessor Reset (µP_RESET)
Microprocessor Reset (µP_RESET)
Microprocessor Reset (µP_RESET) is achieved by holding Pin 38 at logic high for a minimum of 2ms.
If µP_RESET is performed after power has been applied to a transceiver and is stable, the reset time
will be significantly less. At all other times, Pin 38 should be logic low. If Pin 38 is not connected, the
microprocessor will hold Pin 38 logic low.
If µP_RESET is performed after power has been applied to a transceiver and is stable, the reset time
will be significantly less. At all other times, Pin 38 should be logic low. If Pin 38 is not connected, the
microprocessor will hold Pin 38 logic low.
3.2.5
3.2.5
3.2.5
3.2.5 EEPROM Write Enable (WR_ENA)
EEPROM Write Enable (WR_ENA)
EEPROM Write Enable (WR_ENA)
EEPROM Write Enable (WR_ENA)
EEPROM Write Enable (WR_ENA) is enabled when Pin 37 is logic low. Pin 37 must be logic low to
write to the EEPROM. The OEM must ensure a transceiver is NOT write-enabled during initial power
up or during a hardware RESET. Failure to do so may result in corruption of important EEPROM data.
write to the EEPROM. The OEM must ensure a transceiver is NOT write-enabled during initial power
up or during a hardware RESET. Failure to do so may result in corruption of important EEPROM data.