Codan Radio Communications VT-3-150-SN User Manual
2-6
Enhanced AM/FM Synthesizer Instruction Manual OS(R/T)-3(A/H) 29 - 470 MHz
2.3
Synthesizer Digital Circuitry (Digital Board)
Refer to the
"OS(R/T)-3(A/H) Digital Board Schematic Diagram"
on page 4-19 of this manual
.
Microcontroller U4 generates control signals utilized within the synthesizer module. U4
communicates with synthesizer IC U10, monitors the synthesizer lock detect, manages PTT input
and output and determines the operating frequency by reading channel number information from
either the four rotary Binary Coded Decimal (BCD) switches mounted on the main Transmitter and
Receiver PCB, or by reading four externally driven CHANNEL SELECT lines. Microcontroller
U4 is also designed to communicate with Daniels SYNTHESIZER CHANNEL PROGRAMMER
(CP-SC-3) through I/O lines TX DATA (P1-17), RX DATA (P1-9) and BOOTSTRAP (P2-2).
This external programmer places the operating program in non-volatile microprocessor memory
and programs up to 15 user defined channel selections. An internal "watchdog" timer provides
robust software protection in all operating modes.
communicates with synthesizer IC U10, monitors the synthesizer lock detect, manages PTT input
and output and determines the operating frequency by reading channel number information from
either the four rotary Binary Coded Decimal (BCD) switches mounted on the main Transmitter and
Receiver PCB, or by reading four externally driven CHANNEL SELECT lines. Microcontroller
U4 is also designed to communicate with Daniels SYNTHESIZER CHANNEL PROGRAMMER
(CP-SC-3) through I/O lines TX DATA (P1-17), RX DATA (P1-9) and BOOTSTRAP (P2-2).
This external programmer places the operating program in non-volatile microprocessor memory
and programs up to 15 user defined channel selections. An internal "watchdog" timer provides
robust software protection in all operating modes.
Data communication between the digital and analog circuit boards is achieved through four optical
transmitters (U5 through U8) and one optical receiver (U9). The optical interface provides a fully
isolated inter-board data communications link designed to prevent digital noise from interfering
with sensitive PLL circuitry.
transmitters (U5 through U8) and one optical receiver (U9). The optical interface provides a fully
isolated inter-board data communications link designed to prevent digital noise from interfering
with sensitive PLL circuitry.
2.4
Frequency Control
This is hidden text.
2.4.1
BCD Switch Frequency Control
Selection of the desired synthesizer output frequency is straightforward. If all four of the
CHANNEL SELECT lines (CHAN SEL3 - CHAN SEL0) are pulled low (to GND), the
synthesizer will scan the four BCD switches (FSW1 - FSW4) located on the receiver and
transmitter main circuit boards via connections SW1 COM - SW4 COM and PC4 - PC7 and
establish the operating frequency from these switches. The four CHANNEL SELECT lines,
CHAN SEL3 - CHAN SEL0, are connected via the MT-3 transmitter or receiver main board
module connector to the M3 motherboard subrack. These lines are by default normally pulled low
(to GND) via jumpers located on the M3 motherboard subrack.
CHANNEL SELECT lines (CHAN SEL3 - CHAN SEL0) are pulled low (to GND), the
synthesizer will scan the four BCD switches (FSW1 - FSW4) located on the receiver and
transmitter main circuit boards via connections SW1 COM - SW4 COM and PC4 - PC7 and
establish the operating frequency from these switches. The four CHANNEL SELECT lines,
CHAN SEL3 - CHAN SEL0, are connected via the MT-3 transmitter or receiver main board
module connector to the M3 motherboard subrack. These lines are by default normally pulled low
(to GND) via jumpers located on the M3 motherboard subrack.
If any one of the CHANNEL SELECT lines are pulled high (to +9.5 Vdc), then the synthesizer’s
frequency of operation will be determined by the CHANNEL SELECT lines and not the BCD
switches. Up to 15 separate channel frequencies can be pre-programmed into a ‘table’ in non-
volatile microprocessor memory and accessed through binary interpretation of the CHANNEL
SELECT lines. The most significant bit (MSB) in the CHANNEL SELECT binary code is
represented by CHAN SEL3 and the least significant bit (LSB) is represented by CHAN SEL0.
For example, if all CHANNEL SELECT lines are pulled high, (i.e. binary ‘1111’) then the 15
frequency of operation will be determined by the CHANNEL SELECT lines and not the BCD
switches. Up to 15 separate channel frequencies can be pre-programmed into a ‘table’ in non-
volatile microprocessor memory and accessed through binary interpretation of the CHANNEL
SELECT lines. The most significant bit (MSB) in the CHANNEL SELECT binary code is
represented by CHAN SEL3 and the least significant bit (LSB) is represented by CHAN SEL0.
For example, if all CHANNEL SELECT lines are pulled high, (i.e. binary ‘1111’) then the 15
th
frequency entry in the internal channel table will be selected. The channel table is normally pre-
programmed at the factory to user specifications, but may be programmed in the field using Daniels
SYNTHESIZER CHANNEL PROGRAMMER (CP-SC-3).
programmed at the factory to user specifications, but may be programmed in the field using Daniels
SYNTHESIZER CHANNEL PROGRAMMER (CP-SC-3).