Intel i7-2600 CM8062300834302S User Manual

Product codes
CM8062300834302S
Page of 296
Datasheet, Volume 2
181
Processor Configuration Registers
2.11
PCI Device 6 Extended Configuration Registers
 lists the registers arranged by address offset. Register bit descriptions are in 
the sections following the table. 
2.11.1
PVCCAP1—Port VC Capability Register 1
This register describes the configuration of PCI Express Virtual Channels associated 
with this port.
Table 2-13. PCI Device 6 Extended Configuration Register Address Map
Address 
Offset
Register 
Symbol
Register Name
Reset Value
Access
0–FFh
RSVD
Reserved
0h
RO
100–103h
RSVD
Reserved
1401_0002h
RO-V, RO
104–107h
PVCCAP1
Port VC Capability Register 1
0000_0000h
RO
108–10Bh
PVCCAP2
Port VC Capability Register 2
0000_0000h
RO
10C–10Dh
PVCCTL
Port VC Control
0000h
RW, RO
10E–10Fh
RSVD
Reserved
0h
RO
110–113h
VC0RCAP
VC0 Resource Capability
0000_0001h
RO
114–117h
VC0RCTL
VC0 Resource Control
8000_00FFh
RO, RW
118–119h
RSVD
Reserved
0h
RO
11A–11Bh
VC0RSTS
VC0 Resource Status
0002h
RO-V
11C–D37h
RSVD
Reserved
B/D/F/Type:
0/6/0/MMR
Address Offset:
104–107h
Reset Value:
0000_0000h
Access:
RO
Size:
32 bits
BIOS Optimal Default
0000000h
Bit
Attr
Reset 
Value
RST/
PWR
Description
31:7
RO
0h
Reserved
6:4
RO
000b
Uncore
Low Priority Extended VC Count (LPEVCC)
This field indicates the number of (extended) Virtual Channels in 
addition to the default VC belonging to the low-priority VC (LPVC) 
group that has the lowest priority with respect to other VC 
resources in a strict-priority VC Arbitration. The value of 0 in this 
field implies strict VC arbitration.
3
RO
0h
Reserved
2:0
RO
000b
Uncore
Extended VC Count (EVCC)
This field indicates the number of (extended) Virtual Channels in 
addition to the default VC supported by the device.