AMD Sempron 3300 box S754 SDA3300BOX User Manual
Product codes
SDA3300BOX
Chapter 6
333 FSB AMD Sempron™ Processor Model 10 Specifications
23
31993A-1 September 2004
AMD Sempron™ Processor Model 10 Data Sheet
AMD Preliminary Information
6.3
333 FSB AMD Athlon™ System Bus AC Characteristics
The AC characteristics of the AMD Athlon system bus of this
processor are shown in Table 3. The parameters are grouped
based on the source or destination of the signals involved.
processor are shown in Table 3. The parameters are grouped
based on the source or destination of the signals involved.
Table 3.
333 FSB AMD Athlon™ System Bus AC Characteristics
Group
Symbol
Parameter
Min
Max
Units
Notes
All Signals
T
RISE
Output Rise Slew Rate
1
3
V/ns
1
T
FALL
Output Fall Slew Rate
1
3
V/ns
1
Forward
Clocks
T
SKEW-DIFFEDGE
Output skew with respect to a
different clock edge
different clock edge
–
770
ps
2
T
SU
Input Data Setup Time
300
ps
3
T
HD
Input Data Hold Time
300
ps
3
C
IN
Capacitance on input clocks
4
25
pF
C
OUT
Capacitance on output clocks
4
12
pF
Sync
T
VAL
RSTCLK to Output Valid
800
2000
ps
4, 5
T
SU
Setup to RSTCLK
500
ps
4, 6
T
HD
Hold from RSTCLK
500
ps
4, 6
Notes:
1. Rise and fall time ranges are guidelines over which the I/O has been characterized.
2. T
SKEW-DIFFEDGE
is the maximum skew within a clock forwarded group between any two signals or between any signal and its
forward clock, as measured at the package, with respect to different clock edges.
3. Input SU and HD times are with respect to the appropriate Clock Forward Group input clock.
4. The synchronous signals include
PROCRDY, CONNECT, and CLKFWDRST.
5. T
VAL
is RSTCLK rising edge to output valid for PROCRDY. Test Load is 25 pF.
6. T
SU
is setup of CONNECT/CLKFWDRST to rising edge of RSTCLK. T
HD
is hold of CONNECT/CLKFWDRST from rising edge of
RSTCLK.