Intel i5-2520M FF8062700840017 User Manual

76

Datasheet

BCLK

BCLK#

Differential bus clock input to the processor

I

Diff Clk

BCLK_ITP

BCLK_ITP#

Buffered differential bus clock pair to ITP

O

Diff Clk

PEG_CLK 

PEG_CLK#

Differential PCI Express Based 
Graphics/DMI Clock In: These pins 
receive a 100-MHz Serial Reference clock 
from the external clock synthesizer. This 
clock is used to generate the clocks 
necessary for the support of PCI Express. 
This also is the reference clock for Intel(R) 
FDI.

I

Diff Clk

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

Embedded Display Port PLL Differential 
Clock In: With or without SSC -120 MHz.

I

Diff Clk

TCK

TCK (Test Clock): Provides the clock input 
for the processor Test Bus (also known as 
the Test Access Port).

I

CMOS

TDI

TDI (Test Data In): Transfers serial test 
data into the processor. TDI provides the 
serial input needed for JTAG specification 
support.

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CMOS

TDO

Test Data Output

O

CMOS

TDI_M

Test Data In for the GPU/Memory core: 
Tie TDI_M and TDO_M together on the 
motherboard

I

CMOS

TDO_M

Test Data Output from the processor 
core: Tie TDO_M and TDI_M together on the 
motherboard.

O

CMOS