Intel i5-2520M FF8062700840017 User Manual

94

Datasheet

NOTES:
1.

Unless otherwise noted, all specifications in this table are based on pre-silicon estimates and simulations or 
empirical data. These specifications will be updated with characterized data from silicon measurements at 
a later date.

2.

Each processor is programmed with a maximum valid voltage identification value (VID), which is set at 
manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing 
such that two processors at the same frequency may have different settings within the VID range. Please 
note this differs from the VID employed by the processor during a power or thermal management event 
(Intel Adaptive Thermal Monitor, Enhanced Intel SpeedStep Technology, or Low Power States). 

3.

The voltage specification requirements are defined across VCC_SENSE and VSS_SENSE pins on the bottom 
side of the baseboard. Please refer to 7.10.2 for core voltage validation.

4.

Refer to 

 and 

 for the minimum, typical, and maximum V

CC

 allowed for a given current. 

The processor should not be subjected to any V

CC

 and I

CC

 combination wherein V

CC

 exceeds V

CC_MAX

 for a 

given current.

5.

Processor core VR to be designed to electrically support this current

6.

Processor core VR to be designed to thermally support this current indefinitely.

7.

This datasheet assumes that Intel Turbo Boost Technology with Intelligent Power Sharing is enabled.

HFM_VID

VID Range for Highest 
Frequency Mode

SV
LV 
ULV

0.800
0.800
0.750

1.4
1.4
1.4

V

1,2,7

LFM_VID

VID Range for Lowest 
Frequency Mode

SV
LV 
ULV

0.775
0.750
0.725

1.0
1.0
1.0

V

1,2

V

CC

V

CC

 for processor core

See 

V

2,  3,  4

I

CCMAX

Maximum Processor 
Core I

CC

 

SV
LV 
ULV

48
35
27

A

5,7

I

CC_TDC

Thermal Design I

CC

 SV

LV 
ULV

32
22
16

A

6,7

I

CC_LFM

I

CC

 at LFM

SV
LV 
ULV

18
12

8

A

6

I

C6

I

CC

 at C6 Idle-state

SV
LV 
ULV

0.3
0.3
0.3

A

TOL

VID

VID Tolerance

See 

and 

VR Step

VID resolution

12.5

mV

SLOPE

LL

Processor Loadline

SV
LV
ULV

-1.9
-3.0
-3.0

mΩ

Non-VR LL 
contribution

Non-VR Loadline 
Contribution for V

CC

-0.9

mΩ