Intel 200 MHz FV8050366200 User Manual

Product codes
FV8050366200
Page of 51
E
PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY
13
5/23/97 10:47 AM    24318502.DOC
INTEL CONFIDENTIAL
(until publication date)
Table 1.  Pin Cross-Reference by Pin Name (xPGA Package) (Cont’d)
V
CC3
A19
A27
J37
Q37
U37
AC37
AN27
A21
A29
L37
S37
W37
AE37
AN25
A23
E37
L33
T34
Y37
AG37
AN23
A25
G37
N37
U33
AA37
AN29
AN21
V
SS
B06
B18
H02
P02
U35
Z36
AF36
AM12
AM24
B08
B20
H36
P36
V02
AB02
AH02
AM14
AM26
B10
B22
K02
R02
V36
AB36
AJ37
AM16
AM28
B12
B24
K36
R36
X02
AD02
AL37
AM18
AM30
B14
B26
M02
T02
X36
AD36
AM08
AM20
AN37
B16
B28
M36
T36
Z02
AF02
AM10
AM22
NC
A37
S35
AL19
R34
W33
AN35
S33
W35
INC
A03
B02
C01
AN01
AN03
AN05
NOTES:
1.
The FRCMC# pin is not defined for the Pentium
®
 processor with MMX™ technology. This pin should be left as a "NC" or
tied to V
CC3
 via an external pull-up resistor on the Pentium processor with MMX technology.
2.
PICCLK and CLK are 3.3V-tolerant-only on the Pentium processor with MMX technology. Please refer to the 
Pentium
®
Processor Family Developer’s Manual (Order Number 241428) for the CLK and PICCLK signal quality specification.
2.2.
Design Notes
For reliable operation, always connect unused inputs
to an appropriate signal level. Unused active low
inputs should be connected to V
CC3
. Unused active
high inputs should be connected to GND.
No Connect (NC) pins must remain unconnected.
Connection of NC or INC pins may result in
component failure or incompatibility with processor
steppings.
2.3.
Quick Pin Reference
This section gives a brief functional description of
each of the pins. For a detailed description, see the
Hardware Interface chapter in the 
Pentium
®
Processor Family Developer’s Manual
 (Order
Number 241428).
NOTE
All input pins must meet their AC/DC
specifications to guarantee proper functional
behavior.