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Intel III Xeon 500 MHz 80525KX500512 User Manual

Product codes
80525KX500512
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Page of 112
 Datasheet
5
Pentium
®
 III Xeon™ Processor at 500 and 550 MHz
Appendix ..........................................................................................................................86
9.1.10 BP[3:2]# (I/O) .........................................................................................88
9.1.11 BPM[1:0]# (I/O) ......................................................................................88
9.1.12 BPRI# (I).................................................................................................88
9.1.13 BR0# (I/O), BR[3:1]# (I) ..........................................................................88
9.1.14 CPU_SENSE..........................................................................................89
9.1.15 D[63:00]# (I/O)........................................................................................89
9.1.16 DBSY# (I/O) ...........................................................................................90
9.1.17 DEFER# (I).............................................................................................90
9.1.18 DEP[7:0]# (I/O).......................................................................................90
9.1.19 DRDY# (I/O) ...........................................................................................90
9.1.20 EMI .........................................................................................................90
9.1.21 FERR# (O) .............................................................................................90
9.1.22 FLUSH# (I) .............................................................................................90
9.1.23 FRCERR (I/O) ........................................................................................91
9.1.24 HIT# (I/O), HITM# (I/O) ..........................................................................91
9.1.25 IERR# (O)...............................................................................................91
9.1.26 IGNNE# (I)..............................................................................................91
9.1.27 INIT# (I) ..................................................................................................92
9.1.28 INTR - see LINT0 ...................................................................................92
9.1.29 LINT[1:0] (I) ............................................................................................92
9.1.30 LOCK# (I/O) ...........................................................................................92
9.1.31 L2_SENSE .............................................................................................93
9.1.32 NMI - See LINT1 ....................................................................................93
9.1.33 PICCLK (I) ..............................................................................................93
9.1.34 PICD[1:0] (I/O)........................................................................................93
9.1.35 PM[1:0]# (O) ...........................................................................................93
9.1.36 PRDY# (O) .............................................................................................93
9.1.37 PREQ# (I)...............................................................................................93
9.1.38 PWREN[1:0] (I).......................................................................................93
9.1.39 PWRGOOD (I)........................................................................................93
9.1.40 REQ[4:0]# (I/O) ......................................................................................94
9.1.41 RESET# (I) .............................................................................................94
9.1.42 RP# (I/O) ................................................................................................95
9.1.43 RS[2:0]# (I) .............................................................................................95
9.1.44 RSP# (I)..................................................................................................95
9.1.45 SA[2:0] (I) ...............................................................................................95
9.1.46 SELFSB[1:0] (I/O) ..................................................................................96