Intel III 450 MHz 80525PY450512 Data Sheet
Product codes
80525PY450512
100
Datasheet
Intel
®
Pentium
®
III Processor Signal Description
7.2
Signal Summaries
through
list attributes of the processor output, input, and I/O signals.
NOTE:
1. Synchronous assertion with active TDRY# ensures synchronization.
Table 42. Output Signals
Name
Active Level
Clock
Signal Group
FERR#
Low
Asynch
CMOS Output
IERR#
Low
Asynch
CMOS Output
PRDY#
Low
BCLK
AGTL+ Output
SLOTOCC#
Low
Asynch
Power/Other
TDO
High
TCK
TAP Output
THERMTRIP#
Low
Asynch
CMOS Output
VID[4:0]
High
Asynch
Power/Other
Table 43. Input Signals
Name
Active Level
Clock
Signal Group
Qualified
A20M#
Low
Asynch
CMOS Input
Always
1
BPRI#
Low
BCLK
AGTL+ Input
Always
BR1#
Low
BCLK
AGTL+ Input
Always
BCLK
High
—
System Bus Clock
Always
DEFER#
Low
BCLK
AGTL+ Input
Always
FLUSH#
Low
Asynch
CMOS Input
Always
1
IGNNE#
Low
Asynch
CMOS Input
Always
1
INIT#
Low
Asynch
CMOS Input
Always
1
INTR
High
Asynch
CMOS Input
APIC disabled mode
LINT[1:0]
High
Asynch
CMOS Input
APIC enabled mode
NMI
High
Asynch
CMOS Input
APIC disabled mode
PICCLK
High
—
APIC Clock
Always
PREQ#
Low
Asynch
CMOS Input
Always
PWRGOOD
High
Asynch
CMOS Input
Always
RESET#
Low
BCLK
AGTL+ Input
Always
RS[2:0]#
Low
BCLK
AGTL+ Input
Always
RSP#
Low
BCLK
AGTL+ Input
Always
SLP#
Low
Asynch
CMOS Input
During Stop-Grant state
SMI#
Low
Asynch
CMOS Input
STPCLK#
Low
Asynch
CMOS Input
TCK
High
—
TAP Input
TDI
High
TCK
TAP Input
TESTHI
High
Asynch
Power/Other
Always
TMS
High
TCK
TAP Input
TRST#
Low
Asynch
TAP Input
TRDY#
Low
BCLK
AGTL+ Input