Intel i5-3210M AW8063801032301 User Manual

Product codes
AW8063801032301
Page of 168
Datasheet, Volume 1
55
Power Management 
The processor exits a package C-state when a break event is detected. Depending on 
the type of break event, the processor does the following:
• If a core break event is received, the target core is activated and the break event 
message is forwarded to the target core.
— If the break event is not masked, the target core enters the core C0 state and 
the processor enters package C0.
• If the break event was due to a memory access or snoop request.
— But the platform did not request to keep the processor in a higher package C-
state, the package returns to its previous C-state.
— And the platform requests a higher power C-state, the memory access or snoop 
request is serviced and the package remains in the higher power C-state.
 shows package C-state resolution for a dual-core processor. 
 
summarizes package C-state transitions.
Note:
If enabled, the package C-state will be C1E if all cores have resolved a core C1 state or higher.
Table 4-11. Coordination of Core Power States at the Package Level
Package C-State
Core 1
C0
C1
C3
C6
C7
Core 0 
C0
C0
C0
C0
C0
C0
C1
C0
C1
1
C1
1
C1
1
C1
1
C3
C0
C1
1
C3
C3
C3
C6
C0
C1
1
C3
C6
C6
C7
C0
C1
1
C3
C6
C7
Figure 4-4. Package C-State Entry and Exit
C0
C1
C6
C7
C3