Intel i7-3920XM Extreme AW8063801009607 User Manual

Product codes
AW8063801009607
Page of 342
Processor Configuration Registers
130
Datasheet, Volume 2
6
RWS
0b
Powergood
Selectable De-emphasis (selectabledeemphasis) 
When the Link is operating at 5 GT/s speed, selects the level of 
de-emphasis. Encodings: 
1 = -3.5 dB
0 = -6 dB 
Reset Value is implementation specific, unless a specific value 
is required for a selected form factor or platform. 
When the Link is operating at 2.5 GT/s speed, the setting of 
this bit has no effect. Components that support only the 
2.5 GT/s speed are permitted to hardwire this bit to 0b. 
5:4
RO
0h
Reserved (RSVD) 
3:0
RWS
3h
Powergood
Target Link Speed (TLS) 
For Downstream ports, this field sets an upper limit on link 
operational speed by restricting the values advertised by the 
upstream component in its training sequences. 
Defined encodings are:
0001b = 2.5 Gb/s Target Link Speed
0010b = 5 Gb/s Target Link Speed
0011b = 8 Gb/s Target Link Speed
All other encodings are reserved. 
If a value is written to this field that does not correspond to a 
speed included in the Supported Link Speeds field, the result is 
undefined. 
The Reset Value of this field is the highest link speed supported 
by the component (as reported in the Supported Link Speeds 
field of the Link Capabilities Register) unless the corresponding 
platform / form factor requires a different Reset Value. 
For both Upstream and Downstream ports, this field is used to 
set the target compliance mode speed when software is using 
the Enter Compliance bit to force a link into compliance mode. 
B/D/F/Type:
0/1/0–2/PCI
Address Offset:
D0–D1h
Reset Value:
0003h
Access:
RWS, RWS-V
Size:
16 bits
Bit
Access
Reset 
Value
RST/
PWR
Description