Intel i7-3920XM Extreme AW8063801009607 User Manual

Product codes

AW8063801009607

Datasheet, Volume 2

Contents

Introduction ............................................................................................................ 13

Processor Configuration Registers........................................................................... 15
2.1

2.2

PCI Devices and Functions.................................................................................. 16

2.3

System Address Map ......................................................................................... 17
2.3.1

Legacy Address Range ......................................................................... 19

2.3.1.1

DOS Range (0h–9_FFFFh) .......................................................... 20

2.3.1.2

Legacy Video Area (A_0000h–B_FFFFh) ....................................... 20

2.3.1.3

PAM (C_0000h–F_FFFFh) ........................................................... 21

2.3.2

Main Memory Address Range (1 MB – TOLUD)......................................... 22

2.3.2.1

ISA Hole (15 MB – 16 MB) ......................................................... 22

2.3.2.2

TSEG ...................................................................................... 23

2.3.2.3

Protected Memory Range (PMR) – (programmable) ....................... 23

2.3.2.4

DRAM Protected Range (DPR) ..................................................... 24

2.3.2.5

Pre-allocated Memory................................................................ 24

2.3.2.6

Graphics Stolen Spaces ............................................................. 24

2.3.2.7

Intel

Management Engine (Intel

ME) UMA ................................ 25

2.3.3

PCI Memory Address Range (TOLUD – 4 GB)........................................... 25

2.3.3.1

APIC Configuration Space (FEC0_0000h – FECF_FFFFh) ................. 26

2.3.3.2

HSEG (FEDA_0000h – FEDB_FFFFh) ............................................ 27

2.3.3.3

MSI Interrupt Memory Space (FEE0_0000 – FEEF_FFFF) ................ 27

2.3.3.4

High BIOS Area ........................................................................ 27

2.3.4

Main Memory Address Space (4 GB to TOUUD)........................................ 27

2.3.4.1

Memory Re-claim Background .................................................... 28

2.3.4.2

Indirect Accesses to MCHBAR Registers........................................ 29

2.3.4.3

Memory Remapping .................................................................. 29

2.3.4.4

Hardware Remap Algorithm........................................................ 29

2.3.4.5

Programming Model .................................................................. 30

2.3.5

PCI Express* Configuration Address Space ............................................. 35

2.3.6

PCI Express* Graphics Attach (PEG) ...................................................... 35

2.3.7

Graphics Memory Address Ranges ......................................................... 36

2.3.7.1

IOBAR Mapped Access to Device 2 MMIO Space ............................ 36

2.3.7.2

Trusted Graphics Ranges ........................................................... 36

2.3.8

System Management Mode (SMM) ......................................................... 37

2.3.9

SMM and VGA Access through GTT TLB .................................................. 37

2.3.10

ME Stolen Memory Accesses ................................................................. 37

2.3.11

I/O Address Space .............................................................................. 38

2.3.11.1 PCI Express* I/O Address Mapping.............................................. 38

2.3.12

MCTP and KVM Flows ........................................................................... 39

2.3.13

Decode Rules and Cross-Bridge Address Mapping .................................... 39

2.3.13.1 DMI Interface Decode Rules ....................................................... 39

2.3.13.2 PCI Express* Interface Decode Rules........................................... 42

2.3.13.3 Legacy VGA and I/O Range Decode Rules..................................... 43

2.4

I/O Mapped Registers ........................................................................................ 46

2.5

PCI Device 0 Function 0 Configuration Space Registers........................................... 47
2.5.1

VID—Vendor Identification Register ....................................................... 48

2.5.2

DID—Device Identification Register........................................................ 49

2.5.3

PCICMD—PCI Command Register .......................................................... 49

2.5.4

PCISTS—PCI Status Register ................................................................ 50

2.5.5

RID—Revision Identification Register ..................................................... 52

2.5.6

CC—Class Code Register ...................................................................... 52

2.5.7

HDR—Header Type Register.................................................................. 53

2.5.8

SVID—Subsystem Vendor Identification Register ..................................... 53

2.5.9

SID—Subsystem Identification Register.................................................. 53