Intel G640T CM8062301002204 User Manual

116

Datasheet, Volume 2

PCI Express Slot related registers allow for the support of Hot Plug.

9:4

RO-V

00h

Uncore

Negotiated Link Width (NLW)
This field indicates negotiated link width. This field is valid only 

when the link is in the L0, L0s, or L1 states (after link width 

negotiation is successfully completed).
00h = Reserved
01h = X1
02h = X2
04h = X4
08h = X8
10h = X16
All other encodings are reserved. 

3:0

RO-V

1h

Uncore

Current Link Speed (CLS)
This field indicates the negotiated Link speed of the given PCI 

Express Link.
0001b = 2.5 GT/s PCI Express Link
0010b = 5.0 GT/s PCI Express Link
All other encodings are reserved. 
The value in this field is undefined when the Link is not up.

31:19

RW-O

0000h

Uncore

Physical Slot Number (PSN)
This field indicates the physical slot number attached to this Port.
BIOS Requirement: This field must be initialized by BIOS to a 

value that assigns a slot number that is globally unique within the 

chassis.

18

RO

1b

Uncore

No Command Completed Support (NCCS)
When set to 1, this bit indicates that this slot does not generate 

software notification when an issued command is completed by the 

Hot-Plug Controller. This bit is only permitted to be set to 1b if the 

hotplug capable port is able to accept writes to all fields of the Slot 

Control register without delay between successive writes.

17

RO

0b

Uncore

Reserved for Electromechanical Interlock Present (EIP)
When set to 1, this bit indicates that an Electromechanical 

Interlock is implemented on the chassis for this slot.