Intel G640T CM8062301002204 User Manual

Product codes
CM8062301002204
Page of 296
Datasheet, Volume 2
13
Processor Configuration Registers
2
Processor Configuration 
Registers
This chapter contains the following:
• Register terminology
• PCI Devices and Functions on processor
• System address map
• Processor register introduction 
• Detailed register bit descriptions
2.1
Register Terminology
 shows the register-related terminology and register attributes that are used 
Table 2-1.
Register Attributes and Terminology
Item
Description
RO
Read Only: These bits can only be read by software, writes have no effect. The value of the 
bits is determined by the hardware only.
RW
Read / Write: These bits can be read and written by software.
RW1C
Read / Write 1 to Clear: These bits can be read and cleared by software. Writing a '1' to a bit 
will clear it, while writing a '0' to a bit has no effect. Hardware sets these bits.
RW0C
Read / Write 0 to Clear: These bits can be read and cleared by software. Writing a ‘0’ to a bit 
will clear it, while writing a ‘1’ to a bit has no effect. Hardware sets these bits.
RW1S
Read / Write 1 to Set: These bits can be read and set by software. Writing a ‘1’ to a bit will 
set it, while writing a ‘0’ to a bit has no effect. Hardware clears these bits.
RsvdP
Reserved and Preserved: These bits are reserved for future RW implementations and their 
value must not be modified by software. When writing to these bits, software must preserve the 
value read. When SW updates a register that has RsvdP fields, it must read the register value 
first so that the appropriate merge between the RsvdP and updated fields will occur.
RsvdZ
Reserved and Zero: These bits are reserved for future RW1C implementations. SW must use 
0 for writes.
WO
Write Only: These bits can only be written by software, reads return zero. 
Note: Use of this attribute type is deprecated and can only be used to describe bits without 
persistent state.
RC
Read Clear: These bits can only be read by software, but a read causes the bits to be cleared. 
Hardware sets these bits. 
Note: Use of this attribute type is only allowed on legacy functions, as side-effects on reads are 
not desirable.
RSW1C
Read Set / Write 1 to Clear: These bits can be read and cleared by software. Reading a bit 
will set the bit to ‘1’. Writing a ‘1’ to a bit will clear it, while writing a ‘0’ to a bit has no effect.
RCW
Read Clear / Write: These bits can be read and written by software, but a read causes the 
bits to be cleared. 
Note: Use of this attribute type is only allowed on legacy functions, as side-effects on reads are 
not desirable.