Intel G640T CM8062301002204 User Manual
Product codes
CM8062301002204
Datasheet, Volume 2
139
Processor Configuration Registers
2.8.14
SID2—Subsystem Identification Register
This register is used to uniquely identify the subsystem where the PCI device resides.
2.8.15
ROMADR—Video BIOS ROM Base Address Register
The IGD does not use a separate BIOS ROM; therefore, this register is hardwired to 0s.
2.8.16
INTRPIN—Interrupt Pin Register
This register indicates which interrupt pin the device uses. The Integrated Graphics
Device uses INTA#.
Device uses INTA#.
B/D/F/Type:
0/2/0/PCI
Address Offset:
2E–2Fh
Reset Value:
0000h
Access:
RW-O
Size:
16 bits
Bit
Attr
Reset
Value
RST/
PWR
Description
15:0
RW-O
0000h
Uncore
Subsystem Identification (SUBID)
This value is used to identify a particular subsystem. This field
This value is used to identify a particular subsystem. This field
should be programmed by BIOS during boot-up. Once written, this
register becomes Read Only. This register can only be cleared by a
Reset.
B/D/F/Type:
0/2/0/PCI
Address Offset:
30–33h
Reset Value:
0000_0000h
Access:
RO
Size:
32 bits
BIOS Optimal Default
000h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:18
RO
0000h
Uncore
ROM Base Address (RBA)
Hardwired to 0s.
Hardwired to 0s.
17:11
RO
00h
Uncore
Address Mask (ADMSK)
Hardwired to 0s to indicate 256 KB address range.
Hardwired to 0s to indicate 256 KB address range.
10:1
RO
0h
Reserved
0
RO
0b
Uncore
ROM BIOS Enable (RBE)
0 = ROM not accessible.
0 = ROM not accessible.
B/D/F/Type:
0/2/0/PCI
Address Offset:
3Dh
Reset Value:
01h
Access:
RO
Size:
8 bits
Bit
Attr
Reset
Value
RST/
PWR
Description
7:0
RO
01h
Uncore
Interrupt Pin (INTPIN)
As a single function device, the IGD specifies INTA# as its interrupt
As a single function device, the IGD specifies INTA# as its interrupt
pin.
01h =INTA#.
01h =INTA#.