Intel G640T CM8062301002204 User Manual

194

Datasheet, Volume 2

This register controls the resources associated with the DMI Private Channel (VCp).

31

RW

0b

Uncore

Virtual Channel private Enable (VCPE)
0 = Virtual Channel is disabled.

1 = Virtual Channel is enabled. See exceptions below.
Software must use the VC Negotiation Pending bit to check 

whether the VC negotiation is complete. When VC Negotiation 

Pending bit is cleared, a 1 read from this VC Enable bit indicates 

that the VC is enabled (Flow Control Initialization is completed for 

the PCI Express port). A 0 read from this bit indicates that the 

Virtual Channel is currently disabled.
BIOS Requirement:

1.

To enable a Virtual Channel, the VC Enable bits for that Virtual 

Channel must be set in both Components on a Link.

2.

To disable a Virtual Channel, the VC Enable bits for that 

Virtual Channel must be cleared in both Components on a 

Link.

3.

Software must ensure that no traffic is using a Virtual Channel 

at the time it is disabled.

4.

Software must fully disable a Virtual Channel in both 

Components on a Link before re-enabling the Virtual Channel.

30:27

RO

0h

26:24

RW

010b

Uncore

Virtual Channel private ID (VCPID)
Assigns a VC ID to the VC resource. This field can not be modified 

when the VC is already enabled.

23:8

RO

0h

7

RO

0b

Uncore

6:1

RW

00h

Uncore

Traffic Class / Virtual Channel private Map (TCVCPM)
It is recommended that private TC6 (01000000b) is the only value 

that should be programmed into this field for VCp traffic that will 

be translated by a virtualization engine, and TC2 (00000010b) is 

the only value that should be programmed into this field for VCp 

traffic that will not be translated by a virtualization engine. This 

strategy can simplify debug and limit validation permutations.
BIOS Requirement: Program this field with the value 100010b, 

which maps TC2 and TC6 to VCp.

0

RO

0b

Uncore