HP A2Y15AV User Manual

Page of 342
Processor Configuration Registers
230
Datasheet, Volume 2
2.12.19 DMILE1D—DMI Link Entry 1 Description Register
This register provides the first part of a Link Entry which declares an internal link to 
another Root Complex Element.
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
50–53h
Reset Value:
00000000h
Access:
RW-O, RO
Size:
32 bits
BIOS Optimal Default
0000h
Bit
Access
Reset 
Value
RST/
PWR
Description
31:24
RW-O
00h
Uncore
Target Port Number (TPN) 
This field specifies the port number associated with the element 
targeted by this link entry (egress port of PCH). The target port 
number is with respect to the component that contains this 
element as specified by the target component ID.
This can be programmed by BIOS, but the Reset Value will likely 
be correct because the DMI RCRB in the PCH will likely be 
associated with the default egress port for the PCH meaning it 
will be assigned port number 0.
23:16
RW-O
00h
Uncore
Target Component ID (TCID) 
Identifies the physical component that is targeted by this link 
entry.
BIOS Requirement: This field must be initialized according to 
guidelines in the PCI Express* Isochronous/Virtual Channel 
Support Hardware Programming Specification (HPS).
15:2
RO
0h
Reserved (RSVD) 
1
RO
0b
Uncore
Link Type (LTYP) 
This bit indicates that the link points to memory-mapped space 
(for RCRB).
The link address specifies the 64-bit base address of the target 
RCRB.
0
RW-O
0b
Uncore
Link Valid (LV) 
0 = Link Entry is not valid and will be ignored.
1 = Link Entry specifies a valid link.