Intel i5-2540M FF8062700839209 User Manual

Product codes
FF8062700839209
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Interfaces
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Datasheet
The outputs of the graphics engine are surfaces sent to memory, which are then 
retrieved and processed by the planes. The surfaces are then blended in the pipes and 
the display timings are transitioned from display core clock to the pixel (dot) clock.
2.4.1
3D and Video Engines for Graphics Processing
The 3D graphics pipeline architecture simultaneously operates on different primitives or 
on different portions of the same primitive. All the cores are fully programmable, 
increasing the versatility of the 3D Engine. The Gen 5.75 3D engine provides the 
following performance and power-management enhancements:
• Execution units (EUs) increased to 12 from the previous 10 EUs in Gen 5.0.
• Includes Hierarchal-Z
• Includes video quality enhancements
2.4.1.1
3D Engine Execution Units
• Support 12 EUs. The EUs perform 128-bit wide execution per clock. 
• Support SIMD8 instructions for vertex processing and SIMD16 instructions for pixel 
processing.
2.4.1.2
3D Pipeline
2.4.1.2.1
Vertex Fetch (VF) Stage
The VF stage executes 3DPRIMITIVE commands. Some enhancements have been 
included to better support legacy D3D APIs as well as SGI OpenGL*.
2.4.1.2.2
Vertex Shader (VS) Stage
The VS stage performs shading of vertices output by the VF function. The VS unit 
produces an output vertex reference for every input vertex reference received from the 
VF unit, in the order received. 
Figure 7.
Integrated Graphics Controller Unit Block Diagram
Plane A
Cursor B
Sprite B
Plane B
Cursor A
Sprite A
Pipe B
Pipe A
Memory
M
U
X
VGA
Video Engine 
2D Engine
3D Engine 
Clipper
Strip & Fan/Setup
Alpha 
Blend/ 
Gamma
/Panel 
Fitter
Geometry Shader
Vertex Fetch/Vertex 
Shader
Windower/IZ
Intel® 
FDI
eDP