Intel G645 BX80623G645 User Manual

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Datasheet, Volume 2

This register invalidates the IOTLB. The act of writing the upper byte of the IOTLB_REG 
with IVT bit set causes the hardware to perform the IOTLB invalidation.

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Invalidate IOTLB (IVT)
Software requests IOTLB invalidation by setting this bit. Software 

must also set the requested invalidation granularity by 

programming the IIRG field.
Hardware clears the IVT bit to indicate the invalidation request is 

complete. Hardware also indicates the granularity at which the 

invalidation operation was performed through the IAIG field. 

Software must not submit another invalidation request through 

this register while the IVT field is Set, nor update the associated 

Invalidate Address register.
Software must not submit IOTLB invalidation requests when there 

is a context-cache invalidation request pending at this remapping 

hardware unit.
Hardware implementations reporting write-buffer flushing 

requirement (RWBF=1 in Capability register) must implicitly 

perform a write buffer flushing before invalidating the IOTLB.

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IOTLB Invalidation Request Granularity (IIRG)
When requesting hardware to invalidate the IOTLB (by setting the 

IVT bit), software writes the requested invalidation granularity 

through this field. The following are the encodings for the field.
00 = Reserved.
01 = Global invalidation request.
10 = Domain-selective invalidation request. The target domain-id 

must be specified in the DID field.

11 = Page-selective invalidation request. The target address, mask 

and invalidation hint must be specified in the Invalidate 

Address register, and the domain-id must be provided in the 

DID field.

Hardware implementations may process an invalidation request by 

performing invalidation at a coarser granularity than requested. 

Hardware indicates completion of the invalidation request by 

clearing the IVT field. At this time, the granularity at which actual 

invalidation was performed is reported through the IAIG field

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