Intel G645 BX80623G645 User Manual

46

Datasheet, Volume 2

The processor contains two registers that reside in the processor I/O address space—
the Configuration Address (CONFIG_ADDRESS) Register and the Configuration Data 
(CONFIG_DATA) Register. The Configuration Address Register enables/disables the 
configuration space and determines what portion of configuration space is visible 
through the Configuration Data window. 

 lists the registers arranged by address offset. Register bit descriptions are in 

the sections following the table. 

0–1h

VID

Vendor Identification

8086h

 RO

2–3h

DID

Device Identification

0100h

RO-FW, RO-V

4–5h

PCICMD

PCI Command

0006h

 RO, RW

6–7h

PCISTS

PCI Status

0090h

 RO, RW1C

8h

RID

Revision Identification

00h

 RO-FW

9–Bh

CC

Class Code

06_0000h

 RO

C–Dh

RSVD

Reserved

0h

RO

Eh

HDR

Header Type

00h

 RO

F–2Bh

RSVD

Reserved

0h

RO

2C–2Dh

SVID

Subsystem Vendor Identification

0000h

 RW-O

2E–2Fh

SID

Subsystem Identification

0000h

 RW-O

30–33h

RSVD

Reserved

0h

RO

34h

RSVD

Reserved

E0h

 RO

35–3Fh

RSVD

Reserved

0h

RO

40–47h

PXPEPBAR

PCI Express Egress Port Base Address

0000_0000_0

000_0000h

 RW

48–4Fh

MCHBAR

Host Memory Mapped Register Range Base

0000_0000_0

000_0000h

 RW

50–51h

GGC

GMCH Graphics Control Register

0028h

 RW-KL, RW-L

52–53h

RSVD

Reserved

0h

RO

54–57h

DEVEN

Device Enable

0000_209Fh

 RW-L, RO, RW

58–5Bh

PAVPC

Protected Audio Video Path Control

0000_0000h

 RW-L, RW-KL

5C–5Fh

DPR

DMA Protected Range

0000_0000h

 RW-L, RO-V, 

RW-KL

60–67h

PCIEXBAR

PCI Express Register Range Base Address

0000_0000_0

000_0000h

 RW, RW-V

68–6Fh

DMIBAR

Root Complex Register Range Base Address

0000_0000_0

000_0000h

 RW

70–77h

RSVD

Reserved

0000_007F_F

FF0_0000h

 RW-L

78–7Fh

RSVD

Reserved

0000_0000_0

000_0000h

 RW-L, RW-KL

80h

PAM0

Programmable Attribute Map 0

00h

 RW