Kingston Technology 1GB 800MHz DDR2 KHX6400D2LLK2/1GN Data Sheet
Product codes
KHX6400D2LLK2/1GN
Memory Module Specification
Document No. 4804434-001.B00
11/02/06
KHX6400D2LLK2/1GN
1GB (512MB 64M x 64-Bit x 2 pcs.)
PC2-6400 CL4 240-Pin DIMM Kit
KEY
ED
Page 1
DESCRIPTION:
Kingston's KHX6400D2LLK2/1GN is a kit of two low-latency 64M x 64-bit (512MB) DDR2-800
CL4 SDRAM (Synchronous DRAM) memory modules that are NVIDIA
CL4 SDRAM (Synchronous DRAM) memory modules that are NVIDIA
®
SLI
™
-Ready. Both
modules are based on eight 64M x 8-bit DDR2 FBGA components per module. Total kit capacity
is 1GB (1024MB). Each module pair has been tested to run at DDR2 800MHz at low latency timing
of 4-4-4-12 at 2.0V. The SPD is programmed to JEDEC standard latency 800Mhz timing of
5-5-5-15-2T at 1.9V. Each 240-pin DIMM uses gold contact fingers and requires +1.8V. Modules
are intended for use with NVIDIA
is 1GB (1024MB). Each module pair has been tested to run at DDR2 800MHz at low latency timing
of 4-4-4-12 at 2.0V. The SPD is programmed to JEDEC standard latency 800Mhz timing of
5-5-5-15-2T at 1.9V. Each 240-pin DIMM uses gold contact fingers and requires +1.8V. Modules
are intended for use with NVIDIA
®
SLI
™
certified solutions. The electrical and mechanical
specifications are as follows:
FEATURES:
Power supply : Vdd: 1.8V ± 0.1V, Vddq: 1.8V ± 0.1V
Double-data-rate architecture; two data transfers per clock cycle
Bidirectional data strobe(DQS)
Differential clock inputs(CK and CK)
DLL aligns DQ and DQS transition with CK transition
Programmable Read latency 3, 4, 5 (clock)
Burst Length: 4, 8 (Interleave/nibble sequential)
Programmable Burst type (sequential & interleave)
Timing Reference: 800MHz 5-5-5-15-2T at +1.9V / 800MHz 4-4-4-12 at +2.0V
Edge aligned data output, center aligned data input
Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
Serial presence detect with EEPROM
High Performance Heat Spreader
Double-data-rate architecture; two data transfers per clock cycle
Bidirectional data strobe(DQS)
Differential clock inputs(CK and CK)
DLL aligns DQ and DQS transition with CK transition
Programmable Read latency 3, 4, 5 (clock)
Burst Length: 4, 8 (Interleave/nibble sequential)
Programmable Burst type (sequential & interleave)
Timing Reference: 800MHz 5-5-5-15-2T at +1.9V / 800MHz 4-4-4-12 at +2.0V
Edge aligned data output, center aligned data input
Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
Serial presence detect with EEPROM
High Performance Heat Spreader
PCB : Height 1.180” (30.00mm), single sided component
PERFORMANCE:
Clock Cycle Time (tCK) CL=5
3ns (min.) / 8ns (max.)
Row Cycle Time (tRC)
54ns (min.)
Refresh to Active/Refresh Command Time (tRFC)
105ns
Row Active Time (tRAS)
39ns (min.) / 70,000ns (max.)
Single Power Supply of
+1.8V (+/- .1V)
Power
1.622 W (operating per module)
UL Rating
94 V - 0
Operating Temperature
0
o
C to 55
o
C
Storage Temperature
-55
o
C to +125
o
C
T E C H N O L O G Y