Intel i7-3630QM AW8063801106200 User Manual

Product codes
AW8063801106200
Page of 168
Thermal Management
76
Datasheet, Volume 1
5.6.1.3
Clock Modulation
If the frequency/voltage changes are unable to end an Adaptive Thermal Monitor 
event, the Adaptive Thermal Monitor will utilize clock modulation. Clock modulation is 
done by alternately turning the clocks off and on at a duty cycle (ratio between clock 
“on” time and total time) specific to the processor. The duty cycle is adjusted 
dynamically based on the throttling need, and cannot be modified. The period of the 
duty cycle is configured to 32 microseconds when the TCC is active. Cycle times are 
independent of processor frequency. A small amount of hysteresis has been included to 
prevent excessive clock modulation when the processor temperature is near its 
maximum operating temperature. Once the temperature has dropped below the 
maximum operating temperature, and the hysteresis timer has expired, the TCC goes 
inactive and clock modulation ceases. Clock modulation is automatically engaged as 
part of the TCC activation when the frequency/voltage targets are at their minimum 
settings. Processor performance will be decreased by the same amount as the duty 
cycle when clock modulation is active. Snooping and interrupt processing are 
performed in the normal manner while the TCC is active.
5.6.2
Digital Thermal Sensor
Each processor execution core has an on-die Digital Thermal Sensor (DTS) that detects 
the core’s instantaneous temperature. The DTS is the preferred method of monitoring 
processor die temperature because: 
• It is located near the hottest portions of the die.
• It can accurately track the die temperature and ensure that the Adaptive Thermal 
Monitor is not excessively activated. 
Temperature values from the DTS can be retrieved through:
• A software interface using the processor Model Specific Register (MSR). 
• A processor hardware interface as described in 
Note:
When temperature is retrieved by the processor MSR, it is the instantaneous 
temperature of the given core. When temperature is retrieved using PECI, it is the 
average of the highest DTS temperature in the package over a 256 ms time window. 
Intel recommends using the PECI reported temperature for platform thermal control 
that benefits from averaging, such as fan speed control. The average DTS temperature 
may not be a good indicator of package Adaptive Thermal Monitor activation or rapid 
increases in temperature that triggers the Out of Specification status bit within the 
PACKAGE_THERM_STATUS MSR 1B1h and IA32_THERM_STATUS MSR 19Ch.
Note:
Code execution is halted in C1–C7. Package temperature can still be monitored through 
PECI in lower C-states. It is not recommended to read the package temperature using 
the processor MSR while in any C-state. Doing this will bring a core back into C0.
Unlike traditional thermal devices, the DTS outputs a temperature relative to the 
maximum supported operating temperature of the processor (T
j,max
), regardless of 
TCC activation offset. It is the responsibility of software to convert the relative 
temperature to an absolute temperature. The absolute reference temperature is 
readable in the TEMPERATURE_TARGET MSR 1A2h. The temperature returned by the 
DTS is an implied negative integer indicating the relative offset from T
j,max
. The DTS 
does not report temperatures greater than T
j,max