Intel G645 CM8062301262601 User Manual

Datasheet, Volume 2

203

6

RWS

0b

Powerg

ood

Selectable De-emphasis (selectabledeemphasis)
When the Link is operating at 5 GT/s speed, this bit selects the 

level of de-emphasis. Encodings:
1 = -3.5 dB
0 = -6 dB
When the Link is operating at 2.5 GT/s speed, the setting of this bit 

has no effect. Components that support only the 2.5 GT/s speed 

are permitted to hardwire this bit to 0b.
NOTE: For DMI, this bit has no effect in functional mode as DMI is 

half-swing and will use -3.5 dB when de-emphasis is enabled.

5

RWS

0b

Powerg

ood

1 = Disables hardware from changing the link speed for reasons 

other than attempting to correct unreliable link operation by 

reducing link speed.

0 = Enable

4

RWS

0b

Powerg

ood

Enter Compliance (EC)
Software is permitted to force a link to enter Compliance mode at 

the speed indicated in the Target Link Speed field by setting this bit 

to 1 in both components on a link and then initiating a hot reset on 

the link.

3:0

RWS

2h

Powerg

ood

Target Link Speed (TLS)
For Downstream ports, this field sets an upper limit on link 

operational speed by restricting the values advertised by the 

upstream component in its training sequences.
0001b = 2.5 Gb/s Target Link Speed
0010b = 5 Gb/s Target Link Speed
All other encodings are reserved.
If a value is written to this field that does not correspond to a 

speed included in the Supported Link Speeds field, the result is 

undefined.
The Reset Value of this field is the highest link speed supported by 

the component (as reported in the Supported Link Speeds field of 

the Link Capabilities Register) unless the corresponding platform / 

form factor requires a different Reset Value.
For both Upstream and Downstream ports, this field is used to set 

the target compliance mode speed when software is using the 

Enter Compliance bit to force a link into compliance mode.