Supermicro Xeon P4X4-028-512K User Manual
Product codes
P4X4-028-512K
10
Intel® Xeon™ Processor with 533 MHz Front Side Bus at 2 GHz to 3.20 GHz
1.3
References
The reader of this specification should also be familiar with material and concepts presented in the
following documents:.
NOTES:
2. Contact your Intel representative for the latest revision of documents without order numbers.
Document
Intel Order Number
1
AP-485, Intel® Processor Identification and the CPUID Instruction
241618
IA-32 Intel ® Architecture Software Developer's Manual
• Volume I: Basic Architecture
• Volume II: Instruction Set Reference
• Volume III: System Programming Guide
• Volume II: Instruction Set Reference
• Volume III: System Programming Guide
245470
245471
245472
245471
245472
Intel ® Xeon
TM
Processor with 512-KB L2 Cache and Intel
®
E7505 Chipset
Platform Design Guide
http://developer.intel.com
Intel® Xeon™ Processor Thermal Design Guidelines
298348
603 -Pin Socket Design Guidelines
249672
Intel® Xeon™ Processor Specification Update
249678
CK00 Clock Synthesizer/Driver Design Guidelines
249206
VRM 9.0 DC-DC Converter Design Guidelines
249205
VRM 9.1 DC-DC Converter Design Guidelines
298646
Dual Intel® Xeon
TM
Processor Voltage Regulator Down (VRD) Design
Guidelines
298644
ITP700 Debug Port Design Guide
249679
Intel® Xeon™ Processor with 533 MHz Front Side Bus System Compatibility
Guidelines
Intel® Xeon™ Processor with 533 MHz Front Side Bus Signal Integrity
Models
http://developer.intel.com
Intel® Xeon™ Processor with 533 MHz Front Side Bus Mechanical Models in
ProE* Format
http://developer.intel.com
IIntel® Xeon™ Processor with 533 MHz Front Side Bus Mechanical Models
in IGES* Format
http://developer.intel.com
Intel® Xeon™ Processor with 512-KB L2 Cache Front Side Bus Thermal
Models (FloTherm* and ICEPAK* format)
http://developer.intel.com
Intel® Xeon™ Processor with 533 MHz Front Side Bus Core Boundary Scan
Descriptor Language (BSDL) Model
http://developer.intel.com
Wired for Management 2.0 Design Guide
http://developer.intel.com
Boxed Integration Notes
http://support.intel.com/
support/processors/xeon