Supermicro Xeon P4X4-028-512K User Manual

15

1. Diagram not to scale.
2. No specifications for frequencies beyond f

core 

(core frequency).

3. f

peak

, if existent, should be less than 0.05 MHz.

Intel only supports those processor combinations operating with the same front side bus frequency,

core frequency, VID settings, and cache sizes. Not all operating systems can support multiple
processors with mixed frequencies. Intel does not support or validate operation of processors with

different cache sizes. Mixing processors of different steppings but the same model (as per CPUID

instruction) is supported, and is outlined in the Intel® Xeon™ Processor Specification Update.
Additional details are provided in AP-485, the Intel Processor Identification and the CPUID

Instruction application note.

The Intel Xeon processor with 533 MHz Front Side Bus does not sample the pins IGNNE#,

LINT[0]/INTR, LINT[1]/NMI, and A20M# to establish the core to front side bus ratio. Rather, the
processor runs at its tested frequency at initial power-on. If the processor needs to run at a lower

core frequency, as must be done when a higher speed processor is added to a system that contains a

lower frequency processor, the system BIOS is able to effect the change in the core to front side bus
ratio.

0 dB

-28 dB

-34 dB

0.2 dB

-0.5 dB

1 MHz

66 MHz

1 Hz

DC

passband

high frequency

band