Intel i3-3120ME AW8063801117902 User Manual

Datasheet, Volume 1

49

Technologies 

The x2APIC extensions are made available to system software by enabling the local 
x2APIC unit in the “x2APIC” mode. To benefit from x2APIC capabilities, a new operating 
system and a new BIOS are both needed, with special support for the x2APIC mode.

The x2APIC architecture provides backward compatibility to the xAPIC architecture and 
forward extendibility for future Intel platform innovations.

Intel x2APIC technology may not be available on all SKUs.

For more information, refer to the Intel 64 Architecture x2APIC specification at 

http://www.intel.com/products/processor/manuals/

The processor introduces a new mechanism that provides next level of system 
protection by blocking malicious software attacks from user mode code when the 
system is running in the highest privilege level.

This technology helps to protect from virus attacks and unwanted code to harm the 
system.

For more information, please refer to the Intel

Developer’s Manual, Volume 3A (see 

The processor added enhanced power-performance technology which routes interrupts 
to threads or cores based on their sleep states. For example concerning energy 
savings, it routes the interrupt to the active cores without waking the deep idle cores. 
For Performance, it routes the interrupt to the idle (C1) cores without interrupting the 
already heavily loaded cores. This enhancement is mostly beneficial for high interrupt 
scenarios like Gigabit LAN, WLAN peripherals, and so on.