Intel i3-3130M AW8063801111500 User Manual

Datasheet, Volume 1

41

The processor supports the following Intel VT-d features:

• Memory controller and processor graphics comply with Intel

®

 VT-d 1.2 specification

• Two VT-d DMA remap engines:

— iGFX DMA remap engine
— DMI / PEG

• Support for root entry, context entry, and default context
• 39-bit guest physical address and host physical address widths
• Support for 4K page sizes only
• Support for register-based fault recording only (for single entry only) and support 

for MSI interrupts for faults

• Support for both leaf and non-leaf caching
• Support for boot protection of default page table
• Support for non-caching of invalid page table entries
• Support for hardware based flushing of translated but pending writes and pending 

reads, on IOTLB invalidation

• Support for page-selective IOTLB invalidation
• MSI cycles (MemWr to address FEEx_xxxxh) not translated

— Translation faults result in cycle forwarding to VBIOS region (byte enables 

masked for writes). Returned data may be bogus for internal agents, PEG / DMI 

interfaces return unsupported request status.

• Interrupt Remapping is supported
• Queued invalidation is supported
• VT-d translation bypass address range is supported (Pass Through)

Intel VT-d Technology may not be available on all SKUs.

The following features are not supported by the processor with Intel VT-d:

• No support for PCIe* endpoint caching (ATS)
• No support for Intel VT-d read prefetching / snarfing (that is, translations within a 

cacheline are not stored in an internal buffer for reuse for subsequent translations)

• No support for advance fault reporting
• No support for super pages
• No support for Intel VT-d translation bypass address range (such usage models 

need to be resolved with VMM help in setting up the page tables correctly)