Intermec 074787-001 User Manual

To prevent forward biasing of the print controller chips’ protection diodes 
be sure to set the following GPIO lines to output low when U32 is 
disabled:

• PCSTB* - PE30

• PCRESET* - PE28

• PCDATA[1:8] – PE21 – PE14

After U32 has been enabled (set PC_PWR_EN high) for at least 2

μs, 

PCRESET* must be de-asserted. PCSTB* should also be de-asserted 
(output high).

Upon exiting reset, the print controller requires approximately 670 ms to 
initialize, test the print head, and check memory. After that is completed, it 
de-asserts ERROR*. PCBSY will still be asserted at that point, but should 
go low about 15.7 

μs after ERROR* goes high. The print controller is then 

ready to accept data.

The Seiko chip can be configured to accept serial or parallel input. The 
specific RS-232 parameters are selected via 16 configuration jumpers 
connected to U12 and U13. U1 communicates to the print controller via a 
parallel interface, and receives error information via the serial interface. 
Also, the LTPV445 print engine must be selected. For these settings, U12.6 
and U12.8 are pulled high and the other inputs to U12 and U13 are 
grounded. 

The processor sends data to the print controller via an 8-bit parallel 
interface, PCDATA[1:8] (PE21– PE14). The handshaking signals are 
PCSTB* (PE30), and PCBSY (IRQ4 and PA3). 

With PCBSY connected to both an IRQ and a GPIO pin, software can be 
written to control the interface either with either an interrupt service 
routine or by polling.

The following illustration shows the timing diagram for the parallel 
interface. For more details, see the Seiko print controller chip spec. Note 
that the !PACK signal is redundant and is, therefore, not used.