Intermec 074787-001 User Manual
Chapter 2 — Theory of Operation
PB42 Portable Receipt Printer Service Manual
23
Low Speed Configuration
To configure the USB controller as low speed, USMOD[LSS] = 1. To
configure the hardware to low speed, place R1404 and R1401, and remove
R1403 and R1402. The low speed configuration is the default hardware
configuration.
configure the hardware to low speed, place R1404 and R1401, and remove
R1403 and R1402. The low speed configuration is the default hardware
configuration.
To be “seen” by the host when connected, a 1.5
Ω resistor must be
connected between D- and +3.3 V. This resistor, R1401, is enabled by
setting PE31 to output low. To appear disconnected from the host, set
PE31 to output high.
setting PE31 to output low. To appear disconnected from the host, set
PE31 to output high.
The data rate for low speed is 1.5Mbps, but the internal USB clock must be
4x that rate: 6 MHz. SICR[RUSB, TUSB] select the source of this clock.
One of the BRGx sources must be configured to produce a 6 MHz clock,
and selected.
4x that rate: 6 MHz. SICR[RUSB, TUSB] select the source of this clock.
One of the BRGx sources must be configured to produce a 6 MHz clock,
and selected.
Full Speed Configuration
To configure the USB controller as full speed, USMOD[LSS] = 0. To
configure the USB transceiver to high speed, place R1403 and R1402, and
remove R1404 and R1401.
configure the USB transceiver to high speed, place R1403 and R1402, and
remove R1404 and R1401.
To be “seen” by the host when connected, a 1.5
Ω resistor must be
connected between D- and +3.3 V. This resistor, R1402, is enabled by
setting PE31 to output low. To appear disconnected from the host, set
PE31 to output high.
setting PE31 to output low. To appear disconnected from the host, set
PE31 to output high.
The data rate for full speed is 12 Mbps, but the internal USB clock must be
4x that rate: 48 MHz. Since a 48 MHz clock cannot be internally
generated, Y3 and Q1401 must be placed. Y3 is a 48 MHz oscillator and is
connected to CLK2 (PA6). SICR[RUSB, TUSB] select the USB clock
source, and must both be 101.
4x that rate: 48 MHz. Since a 48 MHz clock cannot be internally
generated, Y3 and Q1401 must be placed. Y3 is a 48 MHz oscillator and is
connected to CLK2 (PA6). SICR[RUSB, TUSB] select the USB clock
source, and must both be 101.
Cable Detection
When an active (powered) cable is inserted into or removed from the USB
jack, an interrupt on PC13 occurs. Interrupts on PC13 are handled by the
CPM interrupt controller (CPIC). A cable is inserted when PC13 is high.
jack, an interrupt on PC13 occurs. Interrupts on PC13 are handled by the
CPM interrupt controller (CPIC). A cable is inserted when PC13 is high.
When a USB cable is detected, SUSPND (PB23) should be output low,
otherwise it should be output high. This conserves power.
otherwise it should be output high. This conserves power.
Also, when no cable is detected, the USB baud rate generator, BRGx should
be disabled to conserve power. This is done by clearing BRGCx[EN].
When a cable is detected, set the bit high.
be disabled to conserve power. This is done by clearing BRGCx[EN].
When a cable is detected, set the bit high.
RS-232
The RS-232 interface is a 5-pin implementation that includes RX, TX,
RTS, CTS, and ground. The SCC UART is used for this interface. Also, see
the MPC885 Reference Manual for details on configuring the SCC UART.
RTS, CTS, and ground. The SCC UART is used for this interface. Also, see
the MPC885 Reference Manual for details on configuring the SCC UART.