Intermec 074787-001 User Manual
Chapter 2 — Theory of Operation
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PB42 Portable Receipt Printer Service Manual
The processor defaults to normal high mode. In this mode, the main
system clock runs at full speed (66 MHz). In normal low mode the clock is
divided down by a division factor set by SCCR[DFNL]. This field should
be set to “Divide by 256” (111). Running the processor at this lower speed
(about 258 kHz) will conserve power.
system clock runs at full speed (66 MHz). In normal low mode the clock is
divided down by a division factor set by SCCR[DFNL]. This field should
be set to “Divide by 256” (111). Running the processor at this lower speed
(about 258 kHz) will conserve power.
To enter normal low mode set PLPRCR[CSRC] to 1. Clearing the bit will
return the processor to normal high mode. Switching modes can be done at
any time and will not affect any functions of the chip. Baud rate clocks and
the memory refresh clock are not affected.
return the processor to normal high mode. Switching modes can be done at
any time and will not affect any functions of the chip. Baud rate clocks and
the memory refresh clock are not affected.
Bluetooth Radio Low Power Mode
The Bluetooth module contains firmware that manages its own power
consumption. No action is needed.
consumption. No action is needed.
What To Do In Sleep Mode
While in sleep mode, the processor should only have to refresh the
watchdog timer. It will have to periodically (every 1-2 seconds) exit sleep
mode to do the following:
watchdog timer. It will have to periodically (every 1-2 seconds) exit sleep
mode to do the following:
• Check the battery voltage.
• Check the charging status.
• Properly activate the LEDs according to the user interface definition.
Cable insertion/removal, power cuts, radio connection status, and button
presses are all monitored via interrupts (or polling) on port c and the IRQ
lines. These interrupts must be enabled.
presses are all monitored via interrupts (or polling) on port c and the IRQ
lines. These interrupts must be enabled.
Power Cuts
When no batteries are installed, (which can be detected by both battery
voltages being below 4 V) IRQ1 should be enabled. It will provide an early
warning when power is about to be cut.
voltages being below 4 V) IRQ1 should be enabled. It will provide an early
warning when power is about to be cut.
The 3.3 V DC-DC converter has an on-board comparator that generates an
interrupt when VBB falls below 5.75 V. (VBB is the diode “or” of both
batteries.) LBO* is connected to the non-maskable interrupt, IRQ0. When
this interrupt occurs, the interrupt service routine should prepare for a
power cut by turning off the print controller.
interrupt when VBB falls below 5.75 V. (VBB is the diode “or” of both
batteries.) LBO* is connected to the non-maskable interrupt, IRQ0. When
this interrupt occurs, the interrupt service routine should prepare for a
power cut by turning off the print controller.
If the voltage continues to drop, the PORESET* will be asserted when
VBB falls below 3.5 V. PORESET* will hold the processor in a known state
until the input voltage returns to a valid level.
VBB falls below 3.5 V. PORESET* will hold the processor in a known state
until the input voltage returns to a valid level.
The illustration below shows the printhead power switch, Q201 and its
control logic. HVPSW is normally the controlling signal for the FET. If the
head temperature is too high HTE will automatically turn off the
printhead. Also, if VBB droops below 5 V the printhead will be turned off.
This will not affect the rest of the print controller.
control logic. HVPSW is normally the controlling signal for the FET. If the
head temperature is too high HTE will automatically turn off the
printhead. Also, if VBB droops below 5 V the printhead will be turned off.
This will not affect the rest of the print controller.