Intel G2120T CM8063701391600 User Manual
Product codes
CM8063701391600
Technologies
38
Datasheet, Volume 1
3.3
Intel
®
Hyper-Threading Technology
The processor supports Intel
®
Hyper-Threading Technology (Intel
®
HT Technology)
that allows an execution core to function as two logical processors. While some
execution resources such as caches, execution units, and buses are shared, each
logical processor has its own architectural state with its own set of general-purpose
registers and control registers. This feature must be enabled using the BIOS and
requires operating system support.
execution resources such as caches, execution units, and buses are shared, each
logical processor has its own architectural state with its own set of general-purpose
registers and control registers. This feature must be enabled using the BIOS and
requires operating system support.
Intel recommends enabling Hyper-Threading Technology with Microsoft Windows
Vista*, Microsoft Windows* XP Professional/Windows* XP Home, and disabling Hyper-
Threading Technology using the BIOS for all previous versions of Windows operating
systems. For more information on Hyper-Threading Technology, see:
http://www.intel.com/products/ht/hyperthreading_more.htm.
Vista*, Microsoft Windows* XP Professional/Windows* XP Home, and disabling Hyper-
Threading Technology using the BIOS for all previous versions of Windows operating
systems. For more information on Hyper-Threading Technology, see:
http://www.intel.com/products/ht/hyperthreading_more.htm.
3.4
Intel
®
Turbo Boost Technology
Intel
®
Turbo Boost Technology is a feature that allows the processor core to
opportunistically and automatically run faster than its rated operating frequency if it is
operating below power, temperature, and current limits. Maximum frequency is
dependent on the SKU and number of active cores. No special hardware support is
necessary for Intel Turbo Boost Technology. BIOS and the operating system can enable
or disable Intel Turbo Boost Technology.
operating below power, temperature, and current limits. Maximum frequency is
dependent on the SKU and number of active cores. No special hardware support is
necessary for Intel Turbo Boost Technology. BIOS and the operating system can enable
or disable Intel Turbo Boost Technology.
Note:
Intel Turbo Boost Technology may not be available on all SKUs. Refer to the processor
specification update for details.
3.5
New Instructions
3.5.1
Advanced Encryption Standard New Instructions (AESNI)
A new set of Single Instruction Multiple Data (SIMD) instructions is introduced on the
processor. These instructions enable fast and secure encryption and decryption using
AES. The new architecture introduces six Intel SSE instructions. Four instructions,
namely AESENC, AESENCLAST, AESDEC, and AESDELAST facilitate high performance
AES encryption and decryption. The other two, namely AESIMC and
AESKEYGENASSIST, support the AES key expansion procedure. Together, these
instructions provide a full hardware for support AES, offering security, high
performance, and a great deal of flexibility.
processor. These instructions enable fast and secure encryption and decryption using
AES. The new architecture introduces six Intel SSE instructions. Four instructions,
namely AESENC, AESENCLAST, AESDEC, and AESDELAST facilitate high performance
AES encryption and decryption. The other two, namely AESIMC and
AESKEYGENASSIST, support the AES key expansion procedure. Together, these
instructions provide a full hardware for support AES, offering security, high
performance, and a great deal of flexibility.
3.5.2
PCLMULQDQ Instruction
A carry-less multiplication instruction, PCLMULQDQ, is also introduced on the processor.
The PCLMULQDQ is a new Single Instruction Multiple Data (SIMD) instruction that
computes the 128-bit carry-less multiplication of two, 64-bit operands without
generating and propagating carries. Carry-less multiplication is an essential processing
component of several cryptographic systems and standards. Hence, accelerating carry-
less multiplication can significantly contribute to achieving high-speed, secure
computing and communication.
The PCLMULQDQ is a new Single Instruction Multiple Data (SIMD) instruction that
computes the 128-bit carry-less multiplication of two, 64-bit operands without
generating and propagating carries. Carry-less multiplication is an essential processing
component of several cryptographic systems and standards. Hence, accelerating carry-
less multiplication can significantly contribute to achieving high-speed, secure
computing and communication.
§ §