Intel E5-4603 v2 CM8063501453800 User Manual
Product codes
CM8063501453800
70
Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
Datasheet Volume One
In the event that the processor is tri-stated using power-on-configuration controls, the
PECI client will also be tri-stated. Processor tri-state controls are described in
PECI client will also be tri-stated. Processor tri-state controls are described in
2.5.3.2
Device Discovery
The PECI client is available on all processors. The presence of a PECI enabled processor
in a CPU socket can be confirmed by using the Ping() command described in
in a CPU socket can be confirmed by using the Ping() command described in
. Positive identification of the PECI revision number can be achieved by
issuing the GetDIB() command. The revision number acts as a reference to the PECI
specification document applicable to the processor client definition. Please refer to
specification document applicable to the processor client definition. Please refer to
for details on GetDIB response formatting.
2.5.3.3
Client Addressing
The PECI client assumes a default address of 0x30. The PECI client address for the
processor is configured through the settings of the SOCKET_ID[1:0] signals. Each
processor socket in the system requires that the two SOCKET_ID signals be configured
to a different PECI addresses. Strapping the SOCKET_ID[1:0] pins results in the client
addresses shown in
processor is configured through the settings of the SOCKET_ID[1:0] signals. Each
processor socket in the system requires that the two SOCKET_ID signals be configured
to a different PECI addresses. Strapping the SOCKET_ID[1:0] pins results in the client
addresses shown in
. These package strap(s) are evaluated at the assertion
of PWRGOOD (as depicted in
). Refer to the appropriate Platform Design
Guide (PDG) for recommended resistor values for establishing non-default SOCKET_ID
settings.
settings.
RdPCIConfigLocal()
Client responds with a timeout completion
code of 0x81
Fully functional
WrPCIConfigLocal()
Client responds with a timeout completion
code of 0x81
Fully functional
RdPCIConfig()
Client responds with a timeout completion
code of 0x81
Fully functional
Table 2-16. PECI Client Response During Power-Up (Sheet 2 of 2)
Command
Response During
‘Data Not Ready’
Response During
‘Available Except Core Services’
Figure 2-49. The Processor PECI Power-up Timeline()
PWRGOOD
RESET_N
Core execution
idle
running
Reset uCode
Boot BIOS
PECI Client
Status
Data Not Ready
Available except core
services
SOCKET_ID[1:0]
X
SOCKET ID Valid
In Reset
Fully Operational
In Reset