Intel E3-1280 v3 BX80646E31280V3 User Manual

TMDS data and clock channels. These channels are used to carry video, audio, and

auxiliary data. In addition, HDMI carries a VESA DDC. The DDC is used by an HDMI

Source to determine the capabilities and characteristics of the Sink.

Audio, video, and auxiliary (control/status) data is transmitted across the three TMDS

data channels. The video pixel clock is transmitted on the TMDS clock channel and is

used by the receiver for data recovery on the three data channels. The digital display

data signals driven natively through the PCH are AC coupled and needs level shifting

to convert the AC coupled signals to the HDMI compliant digital signals.

The processor HDMI interface is designed in accordance with the High-Definition

Multimedia Interface with 3D, 4K, Deep Color, and x.v.Color.

TMDS Data Channel 0

TMDS Data Channel 1

TMDS Data Channel 2

TMDS Clock Channel

Display Data Channel (DDC)

The processor Digital Ports can be configured to drive DVI-D. DVI uses TMDS for

transmitting data from the transmitter to the receiver, which is similar to the HDMI

protocol except for the audio and CEC. Refer to the HDMI section for more information

on the signals and data transmission. To drive DVI-I through the back panel the VGA

DDC signals are connected along with the digital data and clock signals from one of

the Digital Ports. When a system has support for a DVI-I port, then either VGA or the

DVI-D through a single DVI-I connector can be driven, but not both simultaneously.

The digital display data signals driven natively through the processor are AC coupled

and need level shifting to convert the AC coupled signals to the HDMI compliant digital

signals.

Intel

®

 Xeon

®

 Processor E3-1200 v3 Product Family

June 2013

Datasheet – Volume 1 of 2

Order No.: 328907-001

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