Intel SC5299WS User Manual

Page of 154
Intel
®
 Entry Server Chassis SC5299-E TPS 
Power Sub-system 
Revision 3.1 
 
 
Intel order number D37594-005 
23
Table 19. PSON# Signal Characteristic 
Signal Type
 
Accepts an open collector/drain input from the system. 
Pull-up to 5V located in power supply. 
PSON
#
 = Low  
ON 
PSON
#
 = High or Open 
OFF 
 
MIN 
MAX 
Logic level low (power supply ON) 
0V 
1.0V 
Logic level high (power supply OFF) 
2.0V 
5.25V 
Source current, Vpson = low 
 
4mA 
Power up delay:    T
pson_on_delay
 5msec 
400msec 
PWOK delay:       T 
pson_pwok
  
50msec 
 
2.1.6.5 
PWOK (Power OK) Output Signal 
PWOK is a power OK signal and is pulled HIGH by the power supply to indicate that all the 
outputs are within the regulation limits of the power supply. When any output voltage falls below 
regulation limits or when AC power has been removed for a time sufficiently long that the power 
supply operation is no longer guaranteed, PWOK will be de-asserted to a LOW state. The start 
of the PWOK delay time is inhibited as long as any power supply output is within current limit. 
Table 20. PWOK Signal Characteristics 
Signal Type
 
Open collector/drain output from power supply. Pull-up 
to VSB located in system. 
PWOK = High 
Power OK 
PWOK = Low 
Power Not OK 
 
MIN MAX 
Logic level low voltage, Isink=4mA 
0V 
0.4V 
Logic level high voltage, Isource=200
  A 
2.4V 5.25V 
Sink current, PWOK = low 
 
4mA 
Source current, PWOK = high 
 
2mA 
PWOK delay:  T
pwok_on
 100ms 
1000ms 
PWOK rise and fall time 
 
100
  sec 
Power down delay: T 
pwok_off
 1ms 
200msec